FAULT COMMUNICATION IN VOLTAGE REGULATOR SYSTEMS

    公开(公告)号:US20220300019A1

    公开(公告)日:2022-09-22

    申请号:US17654805

    申请日:2022-03-14

    申请人: MAXLINEAR, INC.

    摘要: A system may include a voltage regulator controller and a driver. The voltage regulator controller may be configured to maintain a phase voltage. The driver may be associated with the phase voltage. The driver may include a first signal line that may be communicatively coupled to the voltage regulator controller. The driver may be configured to transmit a multiplexed signal on the first signal line to the voltage regulator controller.

    RIPPLE SUPPRESSION IN MULTI-PHASE BUCK CONVERTERS

    公开(公告)号:US20220166323A1

    公开(公告)日:2022-05-26

    申请号:US17403765

    申请日:2021-08-16

    申请人: MAXLINEAR, INC.

    IPC分类号: H02M3/158 H02M3/156

    摘要: Methods and systems for ripple suppression in multi-phase buck converters may comprise a buck converter for providing an output voltage with controlled ripple current. The buck converter may include one or more main buck converter stages and one or more suppression buck converter stages coupled with the one or more main buck converter stages. The one or more suppression buck converter stages may provide suppression currents to reduce ripple currents generated in the one or main buck converter stages.

    Method and system for ripple suppression in multi-phase buck converters

    公开(公告)号:US11095223B2

    公开(公告)日:2021-08-17

    申请号:US16665563

    申请日:2019-10-28

    申请人: Maxlinear, Inc.

    IPC分类号: H02M3/158 H02M3/156 H03M1/14

    摘要: Methods and systems for ripple suppression in multi-phase buck converters may comprise a buck converter for providing an output DC voltage with controlled ripple current. The buck converter may include one or more main buck converter stages with coupled outputs and one or more harmonic suppression buck converter stages in parallel with the one or more main buck converter stages. The one or more suppression buck converter stages may provide suppression currents at the coupled outputs to cancel ripple currents generated in the one or main buck converter stages. Each of the one or more main buck converter stages and each of the one or more suppression buck converter stages may include a stacked transistor pair with an inductor at an output. A drain terminal of one transistor of each transistor pair in the one or more main buck converter stages may be biased at a first supply voltage.