Adaptive phase synchronizer
    1.
    发明授权
    Adaptive phase synchronizer 失效
    自适应相位同步器

    公开(公告)号:US3851101A

    公开(公告)日:1974-11-26

    申请号:US44762774

    申请日:1974-03-04

    Applicant: MOTOROLA INC

    Inventor: EN J BROWN D

    CPC classification number: H04L7/0332

    Abstract: An adaptive phase synchronizer for synchronizing the phase of received digital data with the phase of a local clock include means for taking multiple samples of each bit of the received data, modulo 2 adders and up-down counters for locating the transitions in the data bits, and phase correcting means responsive to said transitions for adjusting the phase of the data over a range in excess of one bit intervals in accordance with the locations of the transitions in the received data relative to the local clock pulses. Means are provided for rendering the phase correcting means non-responsive to the transitions in the data when more or less than one transition per bit occurs.

    Abstract translation: 用于使接收到的数字数据的相位与本地时钟的相位同步的自适应相位同步器包括用于对接收到的数据的每个比特进行多个采样的装置,用于定位数据比特中的转换的模2加法器和递减计数器, 以及响应所述转换的相位校正装置,用于根据接收数据中相对于本地时钟脉冲的转变的位置在超过一个位间隔的范围内调整数据的相位。 提供了用于使相位校正装置不响应数据中的转换的装置,每个比特发生多于一个转换。

    Multi-level error detection code
    2.
    发明授权
    Multi-level error detection code 失效
    多级错误检测代码

    公开(公告)号:US3831144A

    公开(公告)日:1974-08-20

    申请号:US36880373

    申请日:1973-06-11

    Applicant: MOTOROLA INC

    Inventor: EN J

    CPC classification number: H04L1/004

    Abstract: An error detecting coding and decoding system employing an encoder having a plurality of shift register systems for generating independent sequences of check bits for multiple level checks. A decoder having similar shift registers is employed to regenerate the check bits from the transmitted information and to compare the locally generated check bits with the transmitted check bits generated by the encoder.

    Abstract translation: 一种采用具有多个移位寄存器系统的编码器的错误检测编码和解码系统,用于产生用于多级检查的独立的校验位序列。 采用具有类似移位寄存器的解码器从所发送的信息中重新产生校验位,并将本地产生的校验位与由编码器产生的发送校验位进行比较。

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