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公开(公告)号：US20180102404A1
公开(公告)日：2018-04-12
申请号：US15693548
申请日：2017-09-01
Applicant: MEDIATEK INC.
Inventor： Sung-Han WEN , Kuan-Ta CHEN
Abstract: An impedance circuit includes a poly-resistor and a controller. The poly-resistor has a first terminal and a second terminal. The controller generates a first control voltage and a second control voltage. The resistance between the first terminal and the second terminal of the poly-resistor is determined according to the first control voltage and the second control voltage. The second control voltage is different from the first control voltage. The proposed impedance circuit can improve the linearity of the poly-resistor.
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公开(公告)号：US20220321064A1
公开(公告)日：2022-10-06
申请号：US17840874
申请日：2022-06-15
Applicant: MEDIATEK INC.
Inventor： Sung-Han WEN
Abstract: A high-linearity amplifier including a main operational amplifier, a feedback circuit, and a compensation circuit is shown. The feedback circuit couples an output signal of the main operational amplifier to an input port of the main operational amplifier. The compensation circuit couples a former-stage circuit of the amplifier to the input port of the main operational amplifier to compensate for the non-linearity of the feedback circuit. The compensation circuit and the feedback circuit form an inverse paralleling linearization architecture. In the inverse paralleling linearization architecture, a resistor in the feedback circuit corresponds to a resistor in the compensation circuit which is biased in an inversed way in comparison with the corresponding resistor in the feedback circuit.
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公开(公告)号：US20200382072A1
公开(公告)日：2020-12-03
申请号：US16849384
申请日：2020-04-15
Applicant: MEDIATEK INC.
Inventor： Sung-Han WEN
Abstract: An amplifier circuit with in-band gain degradation compensation is shown. The amplifier circuit has an input-stage amplifier, at least one intermediate-stage amplifier, and an output-stage amplifier cascaded between an input port and an output port of the amplifier circuit. A compensation capacitor is coupled between the output port of the amplifier circuit and an output port of the input-stage amplifier. A high-order damping circuit is coupled to an output port of the intermediate-stage amplifier.
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Patent Agency Ranking
公开(公告)号：US20180233499A1
公开(公告)日：2018-08-16
申请号：US15953772
申请日：2018-04-16
Applicant: MEDIATEK INC.
Inventor： Sung-Han WEN , Kuan-Ta CHEN
IPC: H01L27/08 , H01L29/8605 , H01L49/02 , H01C10/14 , H03F3/45
CPC classification number: H01L27/0802 , H01C10/14 , H01L28/20 , H01L29/8605 , H03F3/45475 , H03F3/45937 , H03F2203/45418 , H03F2203/45424 , H03F2203/45528
Abstract: An impedance circuit includes a first poly-resistor and a second poly-resistor. The first poly-resistor has a first terminal coupled to a first node, and a second terminal coupled to a second node. The second poly-resistor has a first terminal coupled to the first node, and a second terminal coupled to the second node. The resistance between the first terminal and the second terminal of the first poly-resistor is determined according to a first control voltage. The resistance between the first terminal and the second terminal of the second poly-resistor is determined according to a second control voltage. The first control voltage and the second control voltage are determined according to a first voltage at the first node and a second voltage at the second node.
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公开(公告)号：US20180033442A1
公开(公告)日：2018-02-01
申请号：US15221937
申请日：2016-07-28
Applicant: MediaTek Inc.
Inventor： Chi-Peng CHANG , Sung-Han WEN , Chieh-Tsen LIN
CPC classification number: G10L25/09 , G10L19/00 , G10L25/21 , H03G3/3089 , H03G7/007
Abstract: An audio codec system which uses a memory to buffer frames of audio while signal power levels of the frames of audio buffered in the memory are detected to generate a signal power look-forward value and zero-crossing points of the frames of audio buffered in the memory are detected to obtain available calibration points for gain control due to a change of the signal power look-forward value. The gain control is divided to be performed at the available calibration points.
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公开(公告)号：US20210152134A1
公开(公告)日：2021-05-20
申请号：US17068034
申请日：2020-10-12
Applicant: MEDIATEK INC.
Inventor： Sung-Han WEN
Abstract: A high-linearity amplifier including a main operational amplifier, a feedback circuit, and a compensation circuit is shown. The feedback circuit couples an output signal of the main operational amplifier to an input port of the main operational amplifier. The compensation circuit is coupled to the input port of the main operational amplifier to compensate for the non-linearity of the feedback circuit. A signal coupled to the input port of the main operational amplifier through the compensation circuit has an inverse phase compared to the output signal of the main operational amplifier.
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公开(公告)号：US20190158065A1
公开(公告)日：2019-05-23
申请号：US16163625
申请日：2018-10-18
Applicant: MEDIATEK Inc.
Inventor： Sung-Han WEN , Chuan-Hung HSIAO
Abstract: A circuit for low-noise reference signal generation comprising a filter unit and a functional unit. The filter unit comprises a transistor and an energy storage component. The transistor comprises a first node, a second node, a control node and a body node. The first node is configured to receive an input signal. The second node is configured to output a filtered signal. The control node is configured to receive a control signal for controlling the transistor to turn on or off. The body node is configured to couple to the input signal, the output signal or a signal which is similar to the input signal or the output signal. The energy storage component is coupled to the second node of the transistor. The functional unit is coupled to the second node of the transistor and the energy storage component. The functional unit has high input impedance.
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8.发明申请公开(公告)号：US20140015610A1
公开(公告)日：2014-01-16
申请号：US13922884
申请日：2013-06-20
Applicant: MediaTek Inc.
Inventor： Sung-Han WEN , Chien-Chung YANG
IPC: H03G3/00
CPC classification number: H03G3/004 , H03F1/301 , H03F3/3022 , H03G3/007
Abstract: An amplifier circuit is disclosed. The amplifier circuit includes a detection circuit, a control amplifier circuit and an output stage. The detection circuit detects disturbances occurring in a first supply voltage and provides detection results. The control amplifier circuit controls a first voltage provided to a first control node and a second voltage provided to a second control node in response to the detection results. The output stage circuit includes a first output power transistor coupled to the control amplifier circuit at the first control node and a second output power transistor coupled to the control amplifier circuit at the second control node. The first voltage and the second voltage are controlled differently when a disturbance is detected to have occurred.
Abstract translation: 公开了一种放大器电路。 放大器电路包括检测电路，控制放大器电路和输出级。 检测电路检测在第一电源电压中发生的干扰并提供检测结果。 响应于检测结果，控制放大器电路控制提供给第一控制节点的第一电压和提供给第二控制节点的第二电压。 输出级电路包括耦合到第一控制节点处的控制放大器电路的第一输出功率晶体管和耦合到第二控制节点处的控制放大器电路的第二输出功率晶体管。 当检测到发生干扰时，第一电压和第二电压被不同地控制。
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