公开(公告)号：US20210313342A1

公开(公告)日：2021-10-07

申请号：US16841700

申请日：2020-04-07

Applicant: MACRONIX International Co., Ltd.

Inventor： WEI-LIANG LIN ,  Wen-Jer Tsai

IPC: H01L27/11582 ,  H01L27/11521 ,  H01L27/11556 ,  H01L29/423 ,  H01L21/28 ,  H01L27/11568 ,  H01L21/02 ,  H01L21/265

Abstract: A 3D memory device includes a substrate, stacked structures formed on the substrate, common source line (CSL) contacts, and NOR flash memories. The substrate has CSLs and memory cell regions alternately arranged along one direction in parallel. The stacked structures are located on the memory cell regions and include a ground select line (GSL) layer and a word line (WL) layer. The CSL contacts are disposed along another direction to connect the CSLs. The NOR flash memories are disposed in the memory cell regions, and each of the NOR flash memories includes at least an epitaxial pillar through the stacked structure, a charge-trapping layer located between the epitaxial pillar and the WL layer, and a high-k layer located between the charge-trapping layer and the WL layer. The epitaxial pillar has a retracted sidewall at a position passing through the GSL layer.