AUDIO VIDEO RECEIVER (AVR) ARCHITECTURE
    2.
    发明公开

    公开(公告)号:US20240284001A1

    公开(公告)日:2024-08-22

    申请号:US18652393

    申请日:2024-05-01

    IPC分类号: H04N21/4363 H04N21/426

    CPC分类号: H04N21/4363 H04N21/42607

    摘要: An AVR device in accordance with one or more embodiments connects audio and video source devices to audio and video rendering devices. A front panel user interface including a display is integrated in the housing of the AVR device. Input-output (IO) modules are coupled to a backplane board in the housing to be connected to the source devices and the rendering devices. The IO modules include at least one network interface. System-on-Modules (SoMs) are mounted on the backplane board. The SoMs are configured to decode and process audio and video data received from the audio and video source devices for rendering by the audio and video rendering devices and execute an operating system generating a GUI displayed on the display of the front panel user interface. A video subsystem module on the backplane board is configured to route the audio and video data between the plurality of SoMs and the IO modules.

    Power over Ethernet (PoE) powered smart speaker

    公开(公告)号:US11277687B1

    公开(公告)日:2022-03-15

    申请号:US17360501

    申请日:2021-06-28

    摘要: A networked speaker device includes a sealed housing and an Ethernet port in the housing for receiving power and audio data from a network router via an Ethernet cable. A power supply subsystem in the housing manages the power received at the Ethernet port. A microprocessor subsystem, powered by the power supply subsystem, receives and processes the audio data to generate output audio signals. A digital audio amplifier, powered by the power supply subsystem, amplifies the output audio signals to drive a speaker driver to render an audio output. The device also includes at least one heater resistor in the housing powered by the power supply subsystem. The at least one heater resistor is controlled by the microprocessor subsystem to automatically heat the interior of the housing when temperature inside the housing falls below a given temperature.

    AUDIO VIDEO RECEIVER (AVR) ARCHITECTURE
    4.
    发明公开

    公开(公告)号:US20240040190A1

    公开(公告)日:2024-02-01

    申请号:US18370172

    申请日:2023-09-19

    IPC分类号: H04N21/4363 H04N21/426

    CPC分类号: H04N21/4363 H04N21/42607

    摘要: An AVR device in accordance with one or more embodiments connects audio and video source devices to audio and video rendering devices. A front panel user interface including a display is integrated in the housing of the AVR device. Input-output (IO) modules are coupled to a backplane board in the housing to be connected to the source devices and the rendering devices. The 10 modules include at least one network interface. System-on-Modules (SoMs) are mounted on the backplane board. The SoMs are configured to decode and process audio and video data received from the audio and video source devices for rendering by the audio and video rendering devices and execute an operating system generating a GUI displayed on the display of the front panel user interface. A video subsystem module on the backplane board is configured to route the audio and video data between the plurality of SoMs and the 10 modules.

    WIRELESS HIGH-RESOLUTION HEADPHONES
    5.
    发明公开

    公开(公告)号:US20230319454A1

    公开(公告)日:2023-10-05

    申请号:US18192425

    申请日:2023-03-29

    IPC分类号: H04R1/10

    摘要: A wireless high-resolution headphones device includes a first earpiece containing a first speaker and a second earpiece containing a second speaker. The device also includes a first wireless transceiver unit operates at a first bandwidth to communicate with an external user device to receive control and/or configuration signals from the external user device. A second wireless transceiver unit operates at a second bandwidth greater than the first bandwidth to communicate with a media source remote from the headphones device to receive high-resolution audio content from the media source. A processor receives and processes the high-resolution audio content to generate audio output signals. The processor also receives and processes the control and/or configuration signals to control operation of and configure the headphones device. Audio amplifiers amplify the audio output signals to drive the first and second speakers to render an audio output. A rechargeable battery powers the device.

    Audio video receiver (AVR) architecture

    公开(公告)号:US12003809B2

    公开(公告)日:2024-06-04

    申请号:US18370172

    申请日:2023-09-19

    IPC分类号: H04N21/4363 H04N21/426

    CPC分类号: H04N21/4363 H04N21/42607

    摘要: An AVR device in accordance with one or more embodiments connects audio and video source devices to audio and video rendering devices. A front panel user interface including a display is integrated in the housing of the AVR device. Input-output (IO) modules are coupled to a backplane board in the housing to be connected to the source devices and the rendering devices. The IO modules include at least one network interface. System-on-Modules (SoMs) are mounted on the backplane board. The SoMs are configured to decode and process audio and video data received from the audio and video source devices for rendering by the audio and video rendering devices and execute an operating system generating a GUI displayed on the display of the front panel user interface. A video subsystem module on the backplane board is configured to route the audio and video data between the plurality of SoMs and the IO modules.

    Audio video receiver (AVR) architecture

    公开(公告)号:US11785285B1

    公开(公告)日:2023-10-10

    申请号:US17749476

    申请日:2022-05-20

    IPC分类号: H04N21/4363 H04N21/426

    CPC分类号: H04N21/4363 H04N21/42607

    摘要: An AVR device in accordance with one or more embodiments connects audio and video source devices to audio and video rendering devices. A front panel user interface including a display is integrated in the housing of the AVR device. Input-output (IO) modules are coupled to a backplane board in the housing to be connected to the source devices and the rendering devices. The IO modules include at least one network interface. System-on-Modules (SoMs) are mounted on the backplane board. The SoMs are configured to decode and process audio and video data received from the audio and video source devices for rendering by the audio and video rendering devices and execute an operating system generating a GUI displayed on the display of the front panel user interface. A video subsystem module on the backplane board is configured to route the audio and video data between the plurality of SoMs and the IO modules.