公开(公告)号：US09941178B2

公开(公告)日：2018-04-10

申请号：US15353305

申请日：2016-11-16

Applicant: Lam Research Corporation

Inventor： Alan Jeffrey Miller ,  Evelio Sevillano ,  Jorge Luque ,  Andrew D. Bailey, III ,  Qing Xu

IPC: H01L21/00 ,  H01L21/66 ,  H01L21/3065 ,  H01L21/67 ,  H01L21/768

CPC classification number: H01L22/26 ,  H01L21/3065 ,  H01L21/67253 ,  H01L21/76898 ,  H01L22/12

Abstract: Systems and methods for processing a semiconductor wafer includes a plasma processing chamber. The plasma processing chamber includes an exterior, an interior region with a wafer receiving mechanism and a viewport disposed on a sidewall of the plasma processing chamber providing visual access from the exterior to the wafer received on the wafer receiving mechanism. A camera is mounted to the viewport of the plasma processing chamber on the exterior and coupled to an image processor. The image processor includes pattern recognition logic to match images of emerging pattern captured and transmitted by the camera, to a reference pattern and to generate signal defining an endpoint when a match is detected. A system process controller coupled to the image processor and the plasma processing chamber receives the signal from the image processor and adjusts controls of one or more resources to stop the etching operation.

公开(公告)号：US20230223292A1

公开(公告)日：2023-07-13

申请号：US18009254

申请日：2021-06-10

Applicant: Lam Research Corporation

Inventor： Lai Wei ,  Ji Soo Kim ,  Alan Jeffrey Miller ,  William Thie ,  Frank Yun Lin ,  Jun Hee Hee Han ,  Jie Liu ,  Conan Chiang ,  Michael John Martin

IPC: H01L21/687 ,  H01J37/32 ,  H01L21/67 ,  H01L21/3065

CPC classification number: H01L21/68721 ,  H01L21/68735 ,  H01J37/32715 ,  H01L21/67069 ,  H01L21/3065 ,  H01J2237/334

Abstract: In some examples, a flat Bottom Shadow Ring (fBSR) is provided for processing a substrate in a processing chamber. An example fBSR comprises an overhang for covering an edge of the substrate in the processing chamber. The overhang includes a fiat zone that extends radially outward over the outer edge of the substrate.

公开(公告)号：US20150311129A1

公开(公告)日：2015-10-29

申请号：US14265275

申请日：2014-04-29

Applicant: Lam Research Corporation

Inventor： Alan Jeffrey Miller ,  Evelio Sevillano ,  Jorge Luque ,  Andrew D. Bailey, III ,  Qing Xu

IPC: H01L21/66 ,  H01L21/67 ,  H01L21/3065

CPC classification number: H01L22/26 ,  H01L21/3065 ,  H01L21/67253 ,  H01L21/76898 ,  H01L22/12

Abstract: Systems and methods for processing a semiconductor wafer includes a plasma processing chamber. The plasma processing chamber includes an exterior, an interior region with a wafer receiving mechanism and a viewport disposed on a sidewall of the plasma processing chamber providing visual access from the exterior to the wafer received on the wafer receiving mechanism. A camera is mounted to the viewport of the plasma processing chamber on the exterior and coupled to an image processor. The image processor includes pattern recognition logic to match images of emerging pattern captured and transmitted by the camera, to a reference pattern and to generate signal defining an endpoint when a match is detected. A system process controller coupled to the image processor and the plasma processing chamber receives the signal from the image processor and adjusts controls of one or more resources to stop the etching operation.

Abstract translation: 用于处理半导体晶片的系统和方法包括等离子体处理室。 等离子体处理室包括外部，具有晶片接收机构的内部区域和设置在等离子体处理室的侧壁上的视口，其提供从外部到晶片接收机构上接收的晶片的视觉访问。 照相机安装在外部的等离子体处理室的视口上并耦合到图像处理器。 图像处理器包括图案识别逻辑，以将由相机捕获和发射的新兴图案的图像与参考图案相匹配，并且当检测到匹配时产生定义端点的信号。 耦合到图像处理器和等离子体处理室的系统处理控制器接收来自图像处理器的信号，并且调整一个或多个资源的控制以停止蚀刻操作。

公开(公告)号：US20170062290A1

公开(公告)日：2017-03-02

申请号：US15353305

申请日：2016-11-16

Applicant: Lam Research Corporation

Inventor： Alan Jeffrey Miller ,  Evelio Sevillano ,  Jorge Luque ,  Andrew D. Bailey, III ,  Qing Xu

IPC: H01L21/66 ,  H01L21/67 ,  H01L21/768 ,  H01L21/3065

CPC classification number: H01L22/26 ,  H01L21/3065 ,  H01L21/67253 ,  H01L21/76898 ,  H01L22/12

Abstract: Systems and methods for processing a semiconductor wafer includes a plasma processing chamber. The plasma processing chamber includes an exterior, an interior region with a wafer receiving mechanism and a viewport disposed on a sidewall of the plasma processing chamber providing visual access from the exterior to the wafer received on the wafer receiving mechanism. A camera is mounted to the viewport of the plasma processing chamber on the exterior and coupled to an image processor. The image processor includes pattern recognition logic to match images of emerging pattern captured and transmitted by the camera, to a reference pattern and to generate signal defining an endpoint when a match is detected. A system process controller coupled to the image processor and the plasma processing chamber receives the signal from the image processor and adjusts controls of one or more resources to stop the etching operation.

Abstract translation: 用于处理半导体晶片的系统和方法包括等离子体处理室。 等离子体处理室包括外部，具有晶片接收机构的内部区域和设置在等离子体处理室的侧壁上的视口，其提供从外部到晶片接收机构上接收的晶片的视觉访问。 照相机安装在外部的等离子体处理室的视口上并耦合到图像处理器。 图像处理器包括图案识别逻辑，以将由相机捕获和发射的新兴图案的图像与参考图案相匹配，并且当检测到匹配时产生定义端点的信号。 耦合到图像处理器和等离子体处理室的系统处理控制器接收来自图像处理器的信号，并且调整一个或多个资源的控制以停止蚀刻操作。

公开(公告)号：US09543225B2

公开(公告)日：2017-01-10

申请号：US14265275

申请日：2014-04-29

Applicant: Lam Research Corporation

Inventor： Alan Jeffrey Miller ,  Evelio Sevillano ,  Jorge Luque ,  Andrew D Bailey, III ,  Qing Xu

IPC: H01L21/66 ,  H01L21/3065 ,  H01L21/67 ,  H01L21/768

CPC classification number: H01L22/26 ,  H01L21/3065 ,  H01L21/67253 ,  H01L21/76898 ,  H01L22/12

Abstract: Systems and methods for processing a semiconductor wafer includes a plasma processing chamber. The plasma processing chamber includes an exterior, an interior region with a wafer receiving mechanism and a viewport disposed on a sidewall of the plasma processing chamber providing visual access from the exterior to the wafer received on the wafer receiving mechanism. A camera is mounted to the viewport of the plasma processing chamber on the exterior and coupled to an image processor. The image processor includes pattern recognition logic to match images of emerging pattern captured and transmitted by the camera, to a reference pattern and to generate signal defining an endpoint when a match is detected. A system process controller coupled to the image processor and the plasma processing chamber receives the signal from the image processor and adjusts controls of one or more resources to stop the etching operation.

Abstract translation: 用于处理半导体晶片的系统和方法包括等离子体处理室。 等离子体处理室包括外部，具有晶片接收机构的内部区域和设置在等离子体处理室的侧壁上的视口，其提供从外部到晶片接收机构上接收的晶片的视觉访问。 照相机安装在外部的等离子体处理室的视口上并耦合到图像处理器。 图像处理器包括图案识别逻辑，以将由相机捕获和发射的新兴图案的图像与参考图案相匹配，并且当检测到匹配时产生定义端点的信号。 耦合到图像处理器和等离子体处理室的系统处理控制器接收来自图像处理器的信号，并且调整一个或多个资源的控制以停止蚀刻操作。