公开(公告)号：US20150227314A1

公开(公告)日：2015-08-13

申请号：US14192831

申请日：2014-02-27

Applicant: LSI Corporation

Inventor： Zhengang Chen ,  Yu Cai ,  Erich F. Haratsch ,  Zhimin Dong

IPC: G06F3/06 ,  G06F11/10

CPC classification number: G06F11/1068 ,  G06F11/1012 ,  G11C11/5642 ,  G11C16/28 ,  G11C29/52 ,  G11C2211/5634 ,  G11C2211/5641 ,  H03M13/37

Abstract: Systems and method relating generally to solid state memory, and more particularly to systems and methods for recovering data from a solid state memory.

Abstract translation: 一般涉及固态存储器的系统和方法，更具体地涉及用于从固态存储器恢复数据的系统和方法。

公开(公告)号：US20150268871A1

公开(公告)日：2015-09-24

申请号：US14243098

申请日：2014-04-02

Applicant: LSI Corporation

Inventor： Nanshan Shu ,  Peng Xu ,  Zhimin Dong ,  Yingyi Ju ,  Jiangang Wu

IPC: G06F3/06

CPC classification number: G06F3/0616 ,  G06F3/064 ,  G06F3/0655 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2206/1014 ,  G06F2212/1036 ,  G06F2212/7201 ,  G06F2212/7204 ,  G06F2212/7211

Abstract: An apparatus having a processor and an interface to a nonvolatile memory having a plurality of blocks is disclosed. The processor is configured to (i) monitor a number of reads since a respective erase in at least one of the blocks in the nonvolatile memory, (ii) move a page from a first block to a second block in response to the number of reads exceeding a first threshold where the first block is partially programmed and (iii) move the page from the first block to the second block in response to the number of reads exceeding a second threshold where the first block is fully programmed. The first threshold is less than the second threshold.

Abstract translation: 公开了具有处理器和具有多个块的非易失性存储器的接口的装置。 处理器被配置为（i）监视多个读取，因为在非易失性存储器中的至少一个块中的相应擦除，（ii）响应于读取次数将页面从第一块移动到第二块 超过其中第一块被部分编程的第一阈值，以及（iii）响应于超过第二块阈值的读取次数将第一块移动到第二块，第一块被完全编程。 第一阈值小于第二阈值。

公开(公告)号：US09229642B2

公开(公告)日：2016-01-05

申请号：US14243098

申请日：2014-04-02

Applicant: LSI Corporation

Inventor： Nanshan Shu ,  Peng Xu ,  Zhimin Dong ,  Yingyi Ju ,  Jiangang Wu

IPC: G06F12/00 ,  G06F3/06

CPC classification number: G06F3/0616 ,  G06F3/064 ,  G06F3/0655 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2206/1014 ,  G06F2212/1036 ,  G06F2212/7201 ,  G06F2212/7204 ,  G06F2212/7211

Abstract: An apparatus having a processor and an interface to a nonvolatile memory having a plurality of blocks is disclosed. The processor is configured to (i) monitor a number of reads since a respective erase in at least one of the blocks in the nonvolatile memory, (ii) move a page from a first block to a second block in response to the number of reads exceeding a first threshold where the first block is partially programmed and (iii) move the page from the first block to the second block in response to the number of reads exceeding a second threshold where the first block is fully programmed. The first threshold is less than the second threshold.

Abstract translation: 公开了具有处理器和具有多个块的非易失性存储器的接口的装置。 处理器被配置为（i）监视多个读取，因为在非易失性存储器中的至少一个块中的相应擦除，（ii）响应于读取次数将页面从第一块移动到第二块 超过其中第一块被部分编程的第一阈值，以及（iii）响应于超过第二块阈值的读取次数将第一块移动到第二块，第一块被完全编程。 第一阈值小于第二阈值。