Abstract:
In one embodiment, a plasma processing device may include a dielectric window, a vacuum chamber, an energy source, and at least one air amplifier. The dielectric window may include a plasma exposed surface and an air exposed surface. The vacuum chamber and the plasma exposed surface of the dielectric window can cooperate to enclose a plasma processing gas. The energy source can transmit electromagnetic energy through the dielectric window and form an elevated temperature region in the dielectric window. The at least one air amplifier can be in fluid communication with the dielectric window. The at least one air amplifier can operate at a back pressure of at least about 1 in-H2O and can provide at least about 30 cfm of air.
Abstract:
A moveable edge ring system for a plasma processing system includes a top edge ring and a first edge ring arranged below the top edge ring. A second edge ring is made of conductive material and includes an upper portion, a middle portion and a lower portion. The top edge ring and the second edge ring are configured to move in a vertical direction relative to a substrate support and the first edge ring when biased upwardly by a lift pin. The second edge ring is arranged below the top edge ring and radially outside of the first edge ring.
Abstract:
Computer-implemented methods of optimizing a process simulation model that predicts a result of a semiconductor device fabrication operation to process parameter values characterizing the semiconductor device fabrication operation are disclosed. The methods involve generating cost values using a computationally predicted result of the semiconductor device fabrication operation and a metrology result produced, at least in part, by performing the semiconductor device fabrication operation in a reaction chamber operating under a set of fixed process parameter values. The determination of the parameters of the process simulation model may employ pre-process profiles, via optimization of the resultant post-process profiles of the parameters against profile metrology results. Cost values for, e.g., optical scatterometry, scanning electron microscopy and transmission electron microscopy may be used to guide optimization.
Abstract:
Computer implemented methods and computer program products have instructions for generating transfer functions that relate segments on lithography photomasks to features produced by photolithography and etching using such segments. Such methods may be characterized by the following elements: (a) receiving after development inspection metrology results produced from one or more first test substrates on which resist was applied and patterned using a set of design layout segments; (b) receiving after etch inspection metrology results produced from one or more second test substrates which were etched after resist was applied and patterned using said set of design layout segments; and (c) generating the transfer function using the set of design layout segments together with corresponding after development inspection metrology results and corresponding after etch inspection metrology results.
Abstract:
A substrate support in a substrate processing system includes an inner portion and an outer portion. The inner portion is positioned below a gas distribution device configured to direct first process gases toward the inner portion. The outer portion includes an edge ring positioned around an outer perimeter of the inner portion to at least partially surround the inner portion and a substrate arranged on the inner portion. The edge ring is configured to be raised and lowered relative to the inner portion, and to direct second process gases toward the inner portion. A controller determines distribution of material deposited on the substrate during processing and, based on the determined distribution, selectively adjusts a position of the edge ring and selectively adjusts flow of at least one of the first process gases and the second process gases.
Abstract:
A method for etching a layer in a plasma chamber with an inner injection zone gas feed and an outer injection zone gas feed is provided. The layer is placed in the plasma chamber. A pulsed etch gas is provided from the inner injection zone gas feed at a first frequency, wherein flow of pulsed etch gas from the inner injection zone gas feed is ramped down to zero. The pulsed etch gas is provided from the outer injection zone gas feed at the first frequency and simultaneous with and out of phase with the pulsed etch gas from the inner injection zone gas feed. The etch gas is formed into a plasma to etch the layer, simultaneous with the providing the pulsed etch gas from the inner injection zone gas feed and providing the pulsed gas from the outer interjection zone gas feed.
Abstract:
A variable capacitor is provided within a radiofrequency (RF) power transmission path to a bias electrode, in addition to an impedance matching circuit provided within the RF power transmission path to the bias electrode. An RF power supply is operated in a pulsed mode to transmit pulses of RF power through the RF power transmission path to the bias electrode. A capacitance of the variable capacitor is set to control a rate at which a DC bias voltage builds up on a substrate present above the bias electrode during each pulse of RF power. The rate at which the DC bias voltage builds up on the substrate controls an ion energy distribution and an ion angular distribution within a plasma exposed to an electromagnetic field emanating from the substrate.
Abstract:
A variable capacitor is provided within a radiofrequency (RF) power transmission path to a bias electrode, in addition to an impedance matching circuit provided within the RF power transmission path to the bias electrode. An RF power supply is operated in a pulsed mode to transmit pulses of RF power through the RF power transmission path to the bias electrode. A capacitance of the variable capacitor is set to control a rate at which a DC bias voltage builds up on a substrate present above the bias electrode during each pulse of RF power. The rate at which the DC bias voltage builds up on the substrate controls an ion energy distribution and an ion angular distribution within a plasma exposed to an electromagnetic field emanating from the substrate.
Abstract:
A chamber is provided. The chamber includes a Faraday shield positioned above a substrate support of the chamber. A dielectric window is disposed over the Faraday shield, and the dielectric window has a center opening. A hub having an internal plenum for passing a flow of fluid received from an input conduit and removing the flow of fluid from an output conduit is further provided. The hub has sidewalls and a center cavity inside of the sidewalls for an optical probe, and the internal plenum is disposed in the sidewalls. The hub has an interface surface that is in physical contact with a back side of the Faraday shield. The physical contact provides for a thermal couple to the Faraday shield at a center region around said center opening, and an outer surface of the sidewalls of the hub are disposed within the center opening of the dielectric window.
Abstract:
A plenum, positioned beneath a first coil and above a window disposed on a top portion of a processing chamber, has side walls and a top surface covering an upper surface of the window and has a first air inlet positioned at a center portion to receive airflow from a first air amplifier. The first air inlet includes holes to distribute the air across the window within the side walls to reduce hotspots at a center portion of the window. The plenum includes a second air inlet at an edge portion of the top surface to receive the airflow from a second air amplifier to reduce hotspots at an edge portion of the window, and a third air inlet between the center and edge portions of the top surface to receive the airflow from a third air amplifier to reduce hotspots at a middle portion of the window.