NANOSCALE PATTERNING METHOD AND INTEGRATED DEVICE FOR ELECTRONIC APPARATUS MANUFACTURED THEREFROM
    4.
    发明申请
    NANOSCALE PATTERNING METHOD AND INTEGRATED DEVICE FOR ELECTRONIC APPARATUS MANUFACTURED THEREFROM 有权
    用于制造电子设备的纳米图案方法和集成装置

    公开(公告)号:US20150187602A1

    公开(公告)日:2015-07-02

    申请号:US14583492

    申请日:2014-12-26

    Abstract: Provided is a nanoscale patterning method using self-assembly, wherein nanoscale patterns having desirable shapes such as a lamella shape, a cylinder shape, and the like, may be formed by using a self-assembly property of a block copolymer, and low segment interaction caused in a structure of 10 nm or less which is a disadvantage of the block copolymer may be prevented. In addition, even though single photolithography is used, pattern density may double as that of the existing nano patterns, and pitch and cycle of the patterns may be controlled to thereby be largely utilized for electronic apparatuses requiring high integration of circuits such as a semiconductor device, and the like.

    Abstract translation: 提供了使用自组装的纳米级图案化方法,其中可以通过使用嵌段共聚物的自组装性质形成具有期望形状的诸如片状,圆柱形等的纳米级图案,并且低片段相互作用 可以防止嵌段共聚物的缺点在10nm以下的结构。 此外,即使使用单一光刻,图案密度可以是现有纳米图案的图案密度的两倍,并且可以控制图案的间距和周期,从而被大量地用于需要诸如半导体器件的电路的高集成度的电子设备 ,等等。

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