公开(公告)号：US12126632B2

公开(公告)日：2024-10-22

申请号：US17558980

申请日：2021-12-22

Applicant: Korea Advanced Institute of Science and Technology

Inventor： Seungwon Shin ,  Jinwoo Kim ,  Minjae Seo

IPC: H04L9/40 ,  G06F9/448 ,  G06F18/214 ,  H04L41/02

CPC classification number: H04L63/1416 ,  G06F9/4498 ,  G06F18/214 ,  H04L41/024 ,  H04L63/1425 ,  H04L63/1433

Abstract: A protocol state fuzzing method for security of a control plane of a distributed software-defined network is provided. The protocol state fuzzing method includes receiving input alphabets being abstract symbols of a protocol message in an ambusher of a distributed network operating system (NOS), converting the input alphabets into the protocol message, and sending the protocol message to a cluster, monitoring, by the cluster, intercommunication between instances in the distributed NOS, and selecting a set of sequences executable in the cluster and searching a cluster log for an output by executing the sequence to generate an attack result.

公开(公告)号：US20230044281A1

公开(公告)日：2023-02-09

申请号：US17558980

申请日：2021-12-22

Applicant: Korea Advanced Institute of Science and Technology

Inventor： Seungwon Shin ,  Jinwoo Kim ,  Minjae Seo

IPC: H04L9/40 ,  H04L41/02 ,  G06K9/62 ,  G06F9/448

Abstract: A protocol state fuzzing method for security of a control plane of a distributed software-defined network is provided. The protocol state fuzzing method includes receiving input alphabets being abstract symbols of a protocol message in an ambusher of a distributed network operating system (NOS), converting the input alphabets into the protocol message, and sending the protocol message to a cluster, monitoring, by the cluster, intercommunication between instances in the distributed NOS, and selecting a set of sequences executable in the cluster and searching a cluster log for an output by executing the sequence to generate an attack result.

公开(公告)号：US20200274543A1

公开(公告)日：2020-08-27

申请号：US16798716

申请日：2020-02-24

Applicant: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： Seung-Tak RYU ,  Minjae Seo

IPC: H03M1/00

Abstract: An electronic circuit includes a first converting circuit, an amplifying circuit, and a second converting circuit. The first converting circuit outputs a first residual voltage associated with converting an analog signal into a first digital signal and a second residual voltage generated based on the first residual voltage. The amplifying circuit generates a third residual voltage by amplifying the first residual voltage through an amplifying path during a first time duration and generates a fourth residual voltage by amplifying the second residual voltage through the amplifying path during a second time duration after the first time duration. The second converting circuit generates a second digital signal associated with the analog signal by performing an interpolation operation based on the third residual voltage and the fourth residual voltage.