公开(公告)号：US11917829B2

公开(公告)日：2024-02-27

申请号：US17445968

申请日：2021-08-26

Applicant: Kioxia Corporation

Inventor： Ayaka Takeoka ,  Yoshitaka Kubota

IPC: H01L29/76 ,  H01L23/00 ,  H10B41/27 ,  H10B41/50 ,  H10B43/27 ,  H10B43/50

CPC classification number: H10B43/50 ,  H01L23/562 ,  H10B41/27 ,  H10B41/50 ,  H10B43/27

Abstract: A semiconductor memory device comprises a semiconductor substrate comprising a first region, a second region, and a third region provided therebetween. The first region comprises: first conductive layers; a first semiconductor layer facing the first conductive layers; and a second semiconductor layer connected to the first semiconductor layer. The second region comprises: a third semiconductor layer and fourth semiconductor layer; and a second conductive layer electrically connected to the third semiconductor layer, the fourth semiconductor layer, and the semiconductor substrate. The third region comprises a fifth semiconductor layer and sixth semiconductor layer that are formed continuously with the second semiconductor layer and the third semiconductor layer or fourth semiconductor layer, and extend in a second direction. The third region comprises first and second portions aligned alternately in the second direction. In the second portions, the fifth and the sixth semiconductor layers are electrically connected.

公开(公告)号：US12232325B2

公开(公告)日：2025-02-18

申请号：US17462854

申请日：2021-08-31

Applicant: Kioxia Corporation

Inventor： Keisuke Nakatsuka ,  Yoshitaka Kubota ,  Tetsuaki Utsumi ,  Yoshiro Shimojo ,  Ryota Katsumata

IPC: H10B43/10 ,  H10B41/10 ,  H10B41/20 ,  H10B41/35 ,  H10B41/41 ,  H10B43/20 ,  H10B43/35 ,  H10B43/40

Abstract: A semiconductor storage device includes a first conductive layer, a second conductive layer, a third conductive layer, a contact plug, a memory trench extending between the second conductive layer and the third conductive layer. The memory trench is formed around the contact plug, and surrounds a first area in which the contact plug is disposed. A second area is separated from the first area and includes a pillar penetrating the first conductive layer. The second conductive layer extends between the first and second areas, and is connected to the first conductive layer. The third conductive layer is on the opposite side of the first area to the second area, and is connected to the first conductive layer.

公开(公告)号：US11925024B2

公开(公告)日：2024-03-05

申请号：US17874685

申请日：2022-07-27

Applicant: KIOXIA CORPORATION

Inventor： Yoshitaka Kubota ,  Erika Kodama

IPC: H10B43/27 ,  H01L23/528

CPC classification number: H10B43/27 ,  H01L23/528

Abstract: According to one embodiment, a semiconductor memory device includes a substrate having a first region and a second region arranged in a first direction. The first region includes word line layers and interlayer insulating layers laminated in a second direction, a first semiconductor layer opposed to the word line layers, and an electric charge accumulating film disposed between them. The second region includes a part of the word line layers and the interlayer insulating layers, first insulating layers and a part of the interlayer insulating layers that separate from the word line layers, a contact that has an outer peripheral surface connected to the first insulating layers, and a second insulating layer disposed between the word line layers and the first insulating layers. The first insulating layers have side surfaces connected to the word line layers and side surfaces connected to the second insulating layer.

公开(公告)号：US11450683B2

公开(公告)日：2022-09-20

申请号：US16808459

申请日：2020-03-04

Applicant: KIOXIA CORPORATION

Inventor： Yoshitaka Kubota ,  Erika Kodama

IPC: H01L27/11582 ,  H01L23/528

Abstract: According to one embodiment, a semiconductor memory device includes a substrate having a first region and a second region arranged in a first direction. The first region includes word line layers and interlayer insulating layers laminated in a second direction, a first semiconductor layer opposed to the word line layers, and an electric charge accumulating film disposed between them. The second region includes a part of the word line layers and the interlayer insulating layers, first insulating layers and a part of the interlayer insulating layers that separate from the word line layers, a contact that has an outer peripheral surface connected to the first insulating layers, and a second insulating layer disposed between the word line layers and the first insulating layers. The first insulating layers have side surfaces connected to the word line layers and side surfaces connected to the second insulating layer.

公开(公告)号：US20210082948A1

公开(公告)日：2021-03-18

申请号：US16808459

申请日：2020-03-04

Applicant: KIOXIA CORPORATION

Inventor： Yoshitaka Kubota ,  Erika Kodama

IPC: H01L27/11582 ,  H01L23/528

Abstract: According to one embodiment, a semiconductor memory device includes a substrate having a first region and a second region arranged in a first direction. The first region includes word line layers and interlayer insulating layers laminated in a second direction, a first semiconductor layer opposed to the word line layers, and an electric charge accumulating film disposed between them. The second region includes a part of the word line layers and the interlayer insulating layers, first insulating layers and a part of the interlayer insulating layers that separate from the word line layers, a contact that has an outer peripheral surface connected to the first insulating layers, and a second insulating layer disposed between the word line layers and the first insulating layers. The first insulating layers have side surfaces connected to the word line layers and side surfaces connected to the second insulating layer.