Abstract:
A control system and method for simultaneously regulating the operation of a plurality of different types of switching power converters. The system utilizes in regulating the power converters sampled data and nonlinear feedback control loops.
Abstract:
A control system and method for simultaneously regulating the operation of a plurality of different types of switching power converters. The system utilizes in regulating the power converters sampled data and nonlinear feedback control loops.
Abstract:
A control system and method for simultaneously regulating the operation of a plurality of different types of switching power converters. The system utilizes in regulating the power converters sampled data and nonlinear feedback control loops.
Abstract:
A synchronous control system includes a logic controller (e.g., microprocessor) which can be put into low power standby or sleep mode by shutting off its clock. A quick-start oscillator (QSO) remains shut off to conserve power when not needed, but awakens rapidly and supplies clock signals to the logic controller for quickly awakening the controller so the latter can to respond to exigent circumstances. One such circumstance can be the drop of a vital supply voltage below a predefined threshold. A low power comparator (LPTC) detects the drop and starts up the QSO which in turn awakens the controller. The controller determines what the reason for the awakening is, quickly responds to the exigent circumstance and then turns the QSO off to thereby conserve power and put itself (QSO) back to sleep. Disclosures are provided for the QSO and a first calibration subsystem used to maintain QSO output frequency within a desired range. Disclosures are provided for the LPTC and a second calibration subsystem used to set its trigger threshold. Disclosure of a novel DAC within the LPTC is also provided.
Abstract:
A direct current to pulse amplitude modulated (“PAM”) current converter, denominated a “PAMCC”, is connected to an individual source of direct current. The PAMCC receives direct current and provides pulse amplitude modulated current at its three output terminals, wherein the current of each terminal is one hundred twenty degrees out of phase with the other two terminals. The pulses are produced at a high frequency relative to the signal modulated on a sequence of pulses. The signal modulated onto a sequence of pulses may represent portions of a lower frequency sine wave or other lower frequency waveform, including DC. When each phased output is connected in parallel with the outputs of similar PAMCCs an array of PAMCCs is formed, wherein each voltage phased output pulse is out of phase with respect to a corresponding current output pulse of the other PAMCCs. An array of PAMCCs constructed in accordance with the present invention form a distributed three-phase multiphase inverter whose combined output is the demodulated sum of the current pulse amplitude modulated by each PAMCC on each phase.
Abstract:
A power converter circuit senses the output voltage (Vo) and controls the converter's duty cycle (d1) to provide a steady output current (Io) or input power (Pin) in each switching cycle (T). During an initial period (Tramp), the controller provides a possibly smaller target current (Iramp) to reduce the system stress while the output voltage rises to a suitable value (InitVtar).
Abstract:
A direct current to pulse amplitude modulated (“PAM”) current converter, denominated a “PAMCC”, is connected to an individual source of direct current. The PAMCC receives direct current and provides pulse amplitude modulated current at its three output terminals, wherein the current of each terminal is one hundred twenty degrees out of phase with the other two terminals. The pulses are produced at a high frequency relative to the signal modulated on a sequence of pulses. The signal modulated onto a sequence of pulses may represent portions of a lower frequency sine wave or other lower frequency waveform, including DC. When each phased output is connected in parallel with the outputs of similar PAMCCs an array of PAMCCs is formed, wherein each voltage phased output pulse is out of phase with respect to a corresponding current output pulse of the other PAMCCs. An array of PAMCCs constructed in accordance with the present invention form a distributed three-phase multiphase inverter whose combined output is the demodulated sum of the current pulse amplitude modulated by each PAMCC on each phase.
Abstract:
To conserve power when regulating the output voltage (Vo) of a power converter, no adjustment is made to the converter's pulse width modulation times (Tp, Ts) even if the output voltage is off target (Vtar), provided that the output voltage does not change or is moving towards the target voltage. In some embodiments, the output voltage is not allowed to stay off target for more than a predetermined length of time. In some embodiments, the minimal adjustments are always large enough to overcome ringing (1004).
Abstract:
To conserve power when regulating the output voltage (Vo) of a power converter, no adjustment is made to the converter's pulse width modulation times (Tp, Ts) even if the output voltage is off target (Vtar), provided that the output voltage does not change or is moving towards the target voltage. In some embodiments, the output voltage is not allowed to stay off target for more than a predetermined length of time. In some embodiments, the minimal adjustments are always large enough to overcome ringing (1004).
Abstract:
A plurality of pulse-width-modulated switching power converters are controlled in a system which includes a programmable control circuit which provides control information to cause generation of pulse-width-modulated signals as appropriate to correct an operation of a switching power converter. The programmable control circuit receives digital information which identifies the topology of each of the switching power converters being controlled. The programmable control circuit also receives digital information which identifies associated target performance for the switching power converters under its control. The programmable control circuit also receives information which is indicative of the performance of the power converters and compares the performance of the power converters with respect to the target performance of the power converters. If a difference between the performance and the target performance is identified, the programmable control circuit generates the control information is needed to correct the operation of the switching power converters.