公开(公告)号：US20220141952A1

公开(公告)日：2022-05-05

申请号：US17088623

申请日：2020-11-04

Applicant: Juniper Networks, Inc.

Inventor： Boris Reynov ,  David K. Owen ,  Michael Clifford Freda ,  Steve M. Wilkinson ,  Jing Zhang

IPC: H05K1/02

Abstract: A disclosed apparatus may be a circuit board that includes (1) a first unique sublaminate that includes a plurality of ground layers and a plurality of signal layers, (2) a second unique sublaminate that includes a plurality of power layers and another plurality of signal layers, and (3) a symmetry axis that bisects the circuit board between the first unique sublaminate and the second unique sublaminate, wherein the first unique sublaminate and the second unique sublaminate are distinct from one another. Various other apparatuses, systems, and methods are also disclosed.

公开(公告)号：US11412610B2

公开(公告)日：2022-08-09

申请号：US17088623

申请日：2020-11-04

Applicant: Juniper Networks, Inc.

Inventor： Boris Reynov ,  David K. Owen ,  Michael Clifford Freda ,  Steve M. Wilkinson ,  Jing Zhang

IPC: H05K1/02 ,  H05K3/46

Abstract: A disclosed apparatus may be a circuit board that includes (1) a first unique sublaminate that includes a plurality of ground layers and a plurality of signal layers, (2) a second unique sublaminate that includes a plurality of power layers and another plurality of signal layers, and (3) a symmetry axis that bisects the circuit board between the first unique sublaminate and the second unique sublaminate, wherein the first unique sublaminate and the second unique sublaminate are distinct from one another. Various other apparatuses, systems, and methods are also disclosed.

公开(公告)号：US11570908B2

公开(公告)日：2023-01-31

申请号：US17248569

申请日：2021-01-29

Applicant: Juniper Networks, Inc.

Inventor： Steve M. Wilkinson ,  Daniel J. Prezioso

IPC: H05K1/02 ,  H05K1/09 ,  H05K1/11 ,  H05K1/18 ,  H05K3/00 ,  H05K3/22 ,  H05K3/36 ,  H05K3/40 ,  H05K3/42 ,  H01L23/498

Abstract: A method may include obtaining a printed circuit board (PCB) that includes a set of vias that include a set of stub regions. The PCB may include a set of layers perpendicular to the set of vias. The set of layers may include a signal layer and a ground layer. The ground layer may be located between the set of stub regions and the signal layer. The method may include drilling to remove at least a portion of a stub region of a via of the set of vias. The method may include performing an electrical test to determine whether a sliver of conductive material is included within the via after drilling to remove the at least a portion of the stub region of the via.

公开(公告)号：US10917976B1

公开(公告)日：2021-02-09

申请号：US15647984

申请日：2017-07-12

Applicant: Juniper Networks, Inc.

Inventor： Steve M. Wilkinson ,  Daniel J. Prezioso

IPC: H05K1/02 ,  H05K1/09 ,  H05K1/11 ,  H05K1/18 ,  H05K3/00 ,  H05K3/36 ,  H05K3/40 ,  H05K3/42 ,  H01L23/498 ,  H05K3/22

Abstract: A method may include obtaining a printed circuit board (PCB) that includes a set of vias that include a set of stub regions. The PCB may include a set of layers perpendicular to the set of vias. The set of layers may include a signal layer and a ground layer. The ground layer may be located between the set of stub regions and the signal layer. The method may include drilling to remove at least a portion of a stub region of a via of the set of vias. The method may include performing an electrical test to determine whether a sliver of conductive material is included within the via after drilling to remove the at least a portion of the stub region of the via.