公开(公告)号：US20060015836A1

公开(公告)日：2006-01-19

申请号：US11129785

申请日：2005-05-16

申请人： James Curtin ,  Kevin McIlvain ,  Ray Raphy ,  Douglas Search ,  Stephen Szulewski

发明人： James Curtin ,  Kevin McIlvain ,  Ray Raphy ,  Douglas Search ,  Stephen Szulewski

IPC分类号： G06F17/50

CPC分类号： G06F17/5031 ,  G06F17/5072 ,  G06F2217/84

摘要： More “timing closure efficient” Timing Driven Placements by implementing our new net weight for negative slack paths to enhance timing closure behavior is provided by a NSRF (Negative Slack Recover Factor). This new weight would not be based on the absolute amount of negative slack in a path, but rather it would be based on the proportion or percentage of the path's total net delay adder that must be recovered in order to achieve timing closure (zero slack). After an initial or previous placement has been created, then a list of paths with timing violations with a Negative Slack Recover Factor (NSRF) is created for each net in each of the timing paths on the list of paths, and then calculating a NSRF net weight factor for use in subsequent placements and also assigning nets in the list of paths with no timing violations a NSRF default value of one.. The NSRF value is calculated as equaling (ZWLM slack value +negative slack value)/ZWLM slack value=(1+(negative slack value/ZWLM slack value)), where ZWLM is a Zero Wire Load Model (ZWLM) value of timing wherein all wire parasitics are removed from consideration in the timing.

摘要翻译： NSRF（Negative Slack Recover Factor）提供了更多的“定时关闭效率”定时驱动的位置，通过实施新的净负载松弛路径来增强时序收敛行为。 这个新的权重不会基于路径中负的松弛的绝对量，而是基于必须恢复的路径的总净延迟加法器的比例或百分比，以实现定时关闭（零松弛） 。 在创建初始或先前的位置之后，然后为路径列表中的每个定时路径中的每个网络创建具有负松弛恢复因子（NSRF）的具有定时违规的路径列表，然后计算NSRF网 权重因子，并在NSRF默认值为1的情况下，在没有定时违规的路径列表中分配网络。NSRF值计算为相等（ZWLM松弛值+负松弛值）/ ZWLM松弛值=（ 1+（负松弛值/ ZWLM松弛值）），其中ZWLM是定时的零线负载模型（ZWLM）值，其中在定时中从考虑中去除所有线寄生。

公开(公告)号：US20060010411A1

公开(公告)日：2006-01-12

申请号：US11129786

申请日：2005-05-16

申请人： James Curtin ,  Kevin McIlvain ,  Ray Raphy ,  Douglas Search ,  Stephen Szulewski

发明人： James Curtin ,  Kevin McIlvain ,  Ray Raphy ,  Douglas Search ,  Stephen Szulewski

IPC分类号： G06F17/50

CPC分类号： G06F17/5031

摘要： A circuit design method utilizes existing late mode worst case slack calculation functions inherent in timing path trace algorithms which only need to record the worst arrival and worst required arrival times at each netlist node as traced paths. Because of this, most individual path tracing is curtailed due to the likelihood that a more critical arrival or required arrival time has already been recorded at a given netlist node. Worst case slacks are then determined by subtracting the worst case arrival time from the worst case required arrival time. In this manner, worst case slack values are calculated for the entire netlist within a reasonable amount of time. The method uses these existing functions by querying the worst case slack at each netlist node under varied timing model scenarios. These varied timing model scenarios include altering the cell and net delays and arrival times in the model. Then, with the worst case slacks from the varied timing model scenarios in hand, the required priority factors, recoverability and path composition factors are computed by comparing the differences in the worst case slack at each netlist node.

摘要翻译： 电路设计方法利用定时路径跟踪算法中固有的现有的后期模式最差情况松弛计算功能，其仅需要记录每个网表节点处的最差到达和最差的到达时间作为跟踪路径。 因此，由于在给定的网表节点已经记录了更为关键的到达时间或必需的到达时间的可能性，大多数单独的路径跟踪被限制。 然后通过从最坏情况所需的到达时间减去最坏情况的到达时间来确定最差的情况。 以这种方式，在合理的时间内，对整个网表计算最坏情况的松弛值。 该方法通过在不同的时序模式情景下查询每个网表节点处最坏情况的松弛来使用这些现有的功能。 这些不同的时间模型情景包括改变模型中的细胞和净延迟和到达时间。 然后，随着手段中不同时间模式情况的最坏情况的松动，通过比较每个网表节点最差情况下的差异，计算所需的优先级因素，可恢复性和路径组成因子。

公开(公告)号：US20080046850A1

公开(公告)日：2008-02-21

申请号：US11877200

申请日：2007-10-23

申请人： James Curtin ,  Kevin Mcllvain ,  Ray Raphy ,  Douglas Search ,  Stephen Szulewski

发明人： James Curtin ,  Kevin Mcllvain ,  Ray Raphy ,  Douglas Search ,  Stephen Szulewski

IPC分类号： G06F17/50

CPC分类号： G06F17/5031 ,  G06F17/5072

摘要： An integrated circuit chip has more “timing closure efficient” Timing Driven Placements by implementing our new net weight for negative slack paths to enhance timing closure behavior is provided by a NSRF (Negative Slack Recover Factor). This new weight would not be based on the absolute amount of negative slack in a path, but rather it would be based on the proportion or percentage of the path's total net delay adder that must be recovered in order to achieve timing closure (zero slack). After an initial or previous placement has been created, then a list of paths with timing violations with a Negative Slack Recover Factor (NSRF) is created for each net in each of the timing paths on the list of paths, and then calculating a NSRF net weight factor for use in subsequent placements and also assigning nets in the list of paths with no timing violations a NSRF default value of one. The NSRF value is calculated as equaling (ZWLM slack value+negative slack value)/ZWLM slack value=(1+(negative slack value/ZWLM slack value)), where ZWLM is a Zero Wire Load Model (ZWLM) value of timing wherein all wire parasitics are removed from consideration in the timing.

摘要翻译： NSRF（Negative Slack Recover Factor）提供集成电路芯片，通过实施新的净负载松弛路径净重以增强时序闭合性能，具有更多的“定时关闭效率”定时驱动位置。 这个新的权重不会基于路径中负的松弛的绝对量，而是基于必须恢复的路径的总净延迟加法器的比例或百分比，以实现定时关闭（零松弛） 。 在创建初始或先前的位置之后，然后为路径列表中的每个定时路径中的每个网络创建具有负松弛恢复因子（NSRF）的具有定时违规的路径列表，然后计算NSRF网 用于后续布局的权重因子，并且在没有定时违规的NSRF默认值为1的路径列表中分配网络。 计算NSRF值为ZWLM松弛值+负松弛值/ ZWLM松弛值=（1+（负松弛值/ ZWLM松弛值）），其中ZWLM是零线负载模型（ZWLM）定时值，其中 所有的电线寄生效应在时间上被忽略。

公开(公告)号：US20060277515A1

公开(公告)日：2006-12-07

申请号：US11466120

申请日：2006-08-22

申请人： James Curtin ,  Ray Raphy ,  Stephen Szulewski

发明人： James Curtin ,  Ray Raphy ,  Stephen Szulewski

IPC分类号： G06F17/50

CPC分类号： G06F17/5031

摘要： A method for determining placement of circuitry during integrated circuit design. The method includes accessing a net list identifying circuitry connections. A plurality of individual net weights are assigned to nets in timing paths within the net list, the individual net weights being valid irrespective of physical design parameters. A composite net weight is determined for said timing paths, the composite net weight being in response to the plurality of individual net weights. Initial placement of the circuitry is determined in response to the composite net weight.

摘要翻译： 一种用于在集成电路设计期间确定电路布置的方法。 该方法包括访问识别电路连接的网络列表。 在网络列表内的定时路径中将多个单独的净权重分配给网络，各个净权重与物理设计参数无关。 对于所述定时路径确定复合净重，所述复合净重是响应于所述多个个体净重。 响应于复合净重确定电路的初始放置。

公开(公告)号：US20060010415A1

公开(公告)日：2006-01-12

申请号：US10890463

申请日：2004-07-12

申请人： James Curtin ,  Ray Raphy ,  Stephen Szulewski

发明人： James Curtin ,  Ray Raphy ,  Stephen Szulewski

IPC分类号： G06F17/50

CPC分类号： G06F17/5031

摘要： A method for determining placement of circuitry during integrated circuit design. The method includes accessing a net list identifying circuitry connections. A plurality of individual net weights are assigned to nets in timing paths within the net list, the individual net weights being valid irrespective of physical design parameters. A composite net weight is determined for said timing paths, the composite net weight being in response to the plurality of individual net weights. Initial placement of the circuitry is determined in response to the composite net weight.

公开(公告)号：US20060010410A1

公开(公告)日：2006-01-12

申请号：US11129784

申请日：2005-05-16

申请人： James Curtin ,  Michael Cadigan ,  Edward Hughes ,  Kevin McIlvain ,  Jose Neves ,  Ray Raphy ,  Douglas Search

发明人： James Curtin ,  Michael Cadigan ,  Edward Hughes ,  Kevin McIlvain ,  Jose Neves ,  Ray Raphy ,  Douglas Search

IPC分类号： G06F17/50 ,  G06F9/45

CPC分类号： G06F17/5031

摘要： Genie is a described computer chip design tool which can analyze the data contained within an entire endpoint report, compute relationships between paths based on shared segments, and display this information graphically to the designer. Specifically, Genie groups failing paths into Timing Islands. A timing island is a group of paths which contain at least one shared segment. The most frequently shared segment is sifted to the top of the priority list for each island, and is labeled as the Hub. Thinking of timing islands as a tree, the hub of the island would be the trunk. If you chop the tree down by the trunk, all of the branches, limbs and twigs will fall down too. This is analogous to fixing the timing failures in the hub, and the fix trickling out to each of the segments that dangle off the hub.

摘要翻译： Genie是一种描述的计算机芯片设计工具，可以分析整个端点报告中包含的数据，计算基于共享段的路径之间的关系，并将图形显示给设计者。 具体来说，Genie团体失败了进入时代岛的路径。 定时岛是包含至少一个共享段的一组路径。 最常见的共享段被筛选到每个岛的优先级列表的顶部，并被标记为Hub。 将定时岛作为一棵树，岛上的中心将是树干。 如果树干被树干砍下来，所有的树枝，四肢和树枝也会掉下来。 这类似于在集线器中修复定时故障，并且修复程序会逐渐转移到每个从集线器上散落的段。

公开(公告)号：US20080066036A1

公开(公告)日：2008-03-13

申请号：US11934995

申请日：2007-11-05

申请人： James Curtin ,  Michael Cadigan ,  Edward Hughes ,  Kevin McIlvain ,  Jose Neves ,  Ray Raphy ,  Douglas Search

发明人： James Curtin ,  Michael Cadigan ,  Edward Hughes ,  Kevin McIlvain ,  Jose Neves ,  Ray Raphy ,  Douglas Search

IPC分类号： G06F17/50

CPC分类号： G06F17/5031

摘要： An integrated Circlet chip is made using Genie, a described computer chip design tool which can analyze the data contained within an entire endpoint report, compute relationships between paths based on shared segments, and display this information graphically to the designer. Specifically, Genie groups failing paths into Timing Islands. A timing island is a group of paths which contain at least one shared segment. The most frequently shared segment is sifted to the top of the priority list for each island, and is labeled as the Hub. Thinking of timing islands as a tree, the hub of the island would be the trunk. If you chop the tree down by the trunk, all of the branches, limbs and twigs will fall down too. This is analogous to fixing the timing failures in the hub, and the fix trickling out to each of the segments that dangle off the hub.

摘要翻译： 使用Genie制作的集成Circlet芯片，Genie是一种描述的计算机芯片设计工具，可以分析整个端点报告中包含的数据，计算基于共享段的路径之间的关系，并将图形显示给设计者。 具体来说，Genie团体失败了进入时代岛的路径。 定时岛是包含至少一个共享段的一组路径。 最常见的共享段被筛选到每个岛的优先级列表的顶部，并被标记为Hub。 将定时岛作为一棵树，岛上的中心将是树干。 如果树干被树干砍下来，所有的树枝，四肢和树枝也会掉下来。 这类似于在集线器中修复定时故障，并且修复程序会逐渐转移到每个从集线器上散落的段。

公开(公告)号：US20080052655A1

公开(公告)日：2008-02-28

申请号：US11876400

申请日：2007-10-22

申请人： James Curtin ,  Michael Cadigan ,  Edward Hughes ,  Kevin Mcllvain ,  Jose Neves ,  Ray Raphy ,  Douglas Search

发明人： James Curtin ,  Michael Cadigan ,  Edward Hughes ,  Kevin Mcllvain ,  Jose Neves ,  Ray Raphy ,  Douglas Search

IPC分类号： G06F17/50

CPC分类号： B62K25/286 ,  B62K3/02 ,  G06F17/5031

摘要： An integrated circuit chip is made using Genie, a described computer chip design tool which can analyze the data contained within an entire endpoint report, compute relationships between paths based on shared segments, and display this information graphically to the designer. Specifically, Genie groups failing paths into Timing Islands. A timing island is a group of paths which contain at least one shared segment. The most frequently shared segment is sifted to the top of the priority list for each island, and is labeled as the Hub. Thinking of timing islands as a tree, the hub of the island would be the trunk. If you chop the tree down by the trunk, all of the branches, limbs and twigs will fall down too. This is analogous to fixing the timing failures in the hub, and the fix trickling out to each of the segments that dangle off the hub.

摘要翻译： 使用Genie制造的集成电路芯片，Genie是一种描述的计算机芯片设计工具，可以分析整个端点报告中包含的数据，计算基于共享段的路径之间的关系，并将图形显示给设计者。 具体来说，Genie团体失败了进入时代岛的路径。 定时岛是包含至少一个共享段的一组路径。 最常见的共享段被筛选到每个岛的优先级列表的顶部，并被标记为Hub。 将定时岛作为一棵树，岛上的中心将是树干。 如果树干被树干砍下来，所有的树枝，四肢和树枝也会掉下来。 这类似于在集线器中修复定时故障，并且修复程序会逐渐转移到每个从集线器上散落的段。

公开(公告)号：US5000543A

公开(公告)日：1991-03-19

申请号：US469625

申请日：1990-01-24

申请人： James Curtin

发明人： James Curtin

IPC分类号： G02B27/22

CPC分类号： G02B27/2257

摘要： A 3-D viewer is created by folding paper such as card stock in a predetermined manner. A first section of the view carries a pair of 3-D lenses and a second section, which is held normal to the plane of the first section when the viewer is in use, has a longitudinal extent substantially equal to the focal length of the lenses. In a first embodiment, a third section is foldably connected to the second section, carries at least one 3-D scene, and is held generally paralle to the first section when the scenes are viewed. Other embodiments add additional sections which are foldably secured to the second or third section, a card holding member and pocket members for holding additonal 3-D scenes. Another embodiment includes slotted card members that are releasably attachable to a card holder member. A lens structure also protects the lens from abrasion and holds the lens in position so that the viewer can be mailed without being damaged.

摘要翻译： 通过以预定的方式折叠诸如卡片纸的纸张来创建3-D观看者。 该视图的第一部分携带一对三维透镜和第二部分，当观察者在使用中时，第二部分垂直于第一部分的平面保持，其纵向范围基本上等于透镜的焦距 。 在第一实施例中，第三部分可折叠地连接到第二部分，承载至少一个3-D场景，并且当观看场景时，第一部分保持与第一部分大致平行。 其他实施例添加了可折叠地固定到第二或第三部分的附加部分，用于保持附加的3D场景的卡片保持部件和口袋部件。 另一个实施例包括可释放地附接到卡保持器构件的开槽卡构件。 透镜结构还保护透镜免受磨损并且将透镜保持在适当位置，使得观察者可以邮寄而不被损坏。

公开(公告)号：US20060243523A1

公开(公告)日：2006-11-02

申请号：US10555846

申请日：2004-06-29

申请人： James Curtin

发明人： James Curtin

IPC分类号： E04G3/00

CPC分类号： E04G21/3233 ,  E04G3/22 ,  E04G5/041 ,  E04G5/06 ,  E04G5/062 ,  E04G21/3214 ,  E04G21/3219

摘要： There is a bracket for use in building construction. The bracket has a support leg (7) with an attachment point (12) for, fixing onto a building frame component (11). The attachment point includes a gripping member (37) mounted on a pivotal linkage (14) extending from the support leg (7). In use of the bracket to carry a working load B the leg and. gripping member can be located against opposite faces of the building frame component so that the working load generates a clamping force on the component between the gripping member (17) and support leg (7) which resists movement of the bracket.

摘要翻译： 有一个用于建筑施工的支架。 支架具有支撑腿（7），其具有用于固定到建筑物框架部件（11）上的附接点（12）。 附接点包括安装在从支撑腿（7）延伸的枢转联动装置（14）上的把持构件（37）。 在使用支架承载工作负荷B的腿和。 夹持构件可以抵靠建筑物框架部件的相对面定位，使得工作负载在夹持构件（17）和抵抗支架移动的支撑腿（7）之间的部件上产生夹紧力。