摘要:
The present invention discloses a digital dimming device and a digital dimming method, for controlling a plurality of light emitting device channels. The method comprises: generating a corresponding plurality of driving signals to control the plurality of light emitting device channels; receiving a PWM input signal having a duty ratio, and phase shifting the PWM input signal to generate multiple PWM output signals with about the same duty ratio as the PWM input signal, but with respectively shifted phases; and enabling or disabling corresponding driving signals by the multiple PWM output signals, respectively.
摘要:
The present invention discloses an adaptive phase-shifted synchronization clock generation circuit and a method for generating phase-shifted synchronization clock. The adaptive phase-shifted synchronization clock generation circuit includes: a current source generating a current which flows through a node to generate a node voltage on the node; a reverse-proportional voltage generator coupled to the node for generating a voltage which is reverse-proportional to the node voltage; a ramp generator receiving a synchronization input signal and generating a ramp signal; a comparator comparing the reverse-proportional voltage to the ramp signal; and a pulse generator for generating a clock signal according to an output from the comparator.
摘要:
The present invention discloses a digital dimming device and a digital dimming method, for controlling a plurality of light emitting device channels. The method comprises: generating a corresponding plurality of driving signals to control the plurality of light emitting device channels; receiving a PWM input signal having a duty ratio, and phase shifting the PWM input signal to generate multiple PWM output signals with about the same duty ratio as the PWM input signal, but with respectively shifted phases; and enabling or disabling corresponding driving signals by the multiple PWM output signals, respectively.
摘要:
A circuit and method for soft start of a system compare a feedback signal produced from an output voltage of the system with a ramp signal to generate a comparison signal, and enables the system once the comparison signal indicating the ramp signal reaches the feedback signal, such that the output voltage becomes active from a residual voltage toward a target level.
摘要:
The present invention discloses an adaptive phase-shifted synchronization clock generation circuit and a method for generating phase-shifted synchronization clock. The adaptive phase-shifted synchronization clock generation circuit includes: a current source generating a current which flows through a node to generate a node voltage on the node; a reverse-proportional voltage generator coupled to the node for generating a voltage which is reverse-proportional to the node voltage; a ramp generator receiving a synchronization input signal and generating a ramp signal; a comparator comparing the reverse-proportional voltage to the ramp signal; and a pulse generator for generating a clock signal according to an output from the comparator.
摘要:
The present invention discloses an adaptive phase-shifted synchronization clock generation circuit and a method for generating phase-shifted synchronization clock. The adaptive phase-shifted synchronization clock generation circuit includes: a current source generating a current which flows through a node to generate a node voltage on the node; a reverse-proportional voltage generator coupled to the node for generating a voltage which is reverse-proportional to the node voltage; a ramp generator receiving a synchronization input signal and generating a ramp signal; a comparator comparing the reverse-proportional voltage to the ramp signal; and a pulse generator for generating a clock signal according to an output from the comparator.
摘要:
The present invention discloses an adaptive phase-shifted synchronization clock generation circuit and a method for generating phase-shifted synchronization clock. The adaptive phase-shifted synchronization clock generation circuit includes: a current source generating a current which flows through a node to generate a node voltage on the node; a reverse-proportional voltage generator coupled to the node for generating a voltage which is reverse-proportional to the node voltage; a ramp generator receiving a synchronization input signal and generating a ramp signal; a comparator comparing the reverse-proportional voltage to the ramp signal; and a pulse generator for generating a clock signal according to an output from the comparator.
摘要:
A multi-channel regulator system includes serially connected PWM integrated circuits, each of which determines a PWM signal for a respective channel to operate therewith, and individually controls its operation mode according to whether or not an external clock is detected. Therefore, each channel will not be limited to operate under a constant mode and could become a master channel or a slave channel. Additionally, each of the PWM integrated circuits generates a phase shifted synchronous clock for its next channel during it is enabled, and thus all the channels operate in a synchronous but phase interleaving manner.
摘要:
The present invention discloses a circuit and a method for controlling a light emitting device, and an integrated circuit therefore. The circuit for controlling a light emitting device comprises: a power stage controller circuit controlling a power stage circuit to convert an input voltage to an output voltage, which is supplied to at least one light emitting device channel including at least one light emitting device; a transistor switch in the light emitting device channel; and a current source circuit controlling a current through the light emitting device channel, wherein the power stage controller circuit and the current source circuit are integrated in an integrated circuit which provides a control voltage to control a gate of the transistor switch.
摘要:
A ramp generator is provided to provide a multi-slope ramp signal for a PWM power converter. The ramp generator determines the slope turning points for the multi-slope ramp signal according to the error signal of the PWM power converter and thereby improve the transient response of the PWM power converter. Preferably, the slope turning point of the multi-slope ramp signal varies with the average of the error signal and is thus adaptive to the error signal and thereby the load condition.