公开(公告)号：US20190260380A1

公开(公告)日：2019-08-22

申请号：US15899370

申请日：2018-02-20

申请人： International Business Machines Corporation

发明人： Steven R. Carlough ,  Susan M. Eickhoff ,  MICHAEL W. HARPER ,  Michael B. Spear ,  Gary A. Van Huben

IPC分类号： H03L7/085 ,  H03L7/081 ,  H04L7/00 ,  G06F1/10 ,  G06F1/06 ,  G06F11/16

摘要： A calibration controller of a receiving chip learns a difference between a first clock phase of an input clock for controlling inputs on a data path to a buffer of the receiving chip at a clock boundary and a second clock phase of a chip clock for controlling outputs from the buffer on the data path at the clock boundary. The calibration controller dynamically adjusts a phase of a reference clock driving a phase locked loop that outputs the chip clock to adjust the second clock phase of the chip clock with respect to the first clock phase to minimize a latency on the data path at the clock boundary to a half a cycle granularity.