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公开(公告)号:US20180149696A1
公开(公告)日:2018-05-31
申请号:US15808061
申请日:2017-11-09
Applicant: International Business Machines Corporation
Inventor: KARL R. ERICKSON , PHIL C. PAONE , DAVID P. PAULSEN , JOHN E. SHEETS, II , GREGORY J. UHLMANN
IPC: G01R31/3177 , H03K19/177
CPC classification number: H03K19/17744 , H03K19/17792
Abstract: Generating a unique die identifier for an electronic chip including placing the electronic chip in an identifier generation state, wherein the electronic chip comprises a set of test circuits, wherein each of the set of test circuits is attached to a corresponding component on the electronic chip; obtaining an ordered list of race pairs of the set of test circuits; for each race pair in the ordered list of race pairs of the set of test circuits: selecting the race pair of test circuits; executing a race between the selected race pair; and adding an element to the unique die identifier based on an outcome of the executed race; and returning the electronic chip to an operational state.
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公开(公告)号:US20180348271A1
公开(公告)日:2018-12-06
申请号:US15612360
申请日:2017-06-02
Applicant: International Business Machines Corporation
Inventor: KARL R. ERICKSON , PHIL C. PAONE , GEORGE F. PAULIK , DAVID P. PAULSEN , RAYMOND A. RICHETTA , JOHN E. SHEETS, II , GREGORY J. UHLMANN
CPC classification number: G01R27/2605 , G06F17/18 , G06G7/14 , G06N5/02
Abstract: Cognitive analysis using applied analog circuits including receiving, by a circuit, a first set of data results and a second set of data results; charging a first capacitor on the circuit with a first unit of charge for each of the first set of data results that indicates a positive data point; charging a second capacitor on the circuit with a second unit of charge for each of the second set of data results that indicates a positive data point; applying a charge from the first capacitor and a charge from the second capacitor to an analog unit of the circuit; and generating a signal on a circuit output indicating that a ratio of the positive data points in the first set of data results to the positive data points in the second set of data results is greater than a statistical significance.
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公开(公告)号:US20180239586A1
公开(公告)日:2018-08-23
申请号:US15437505
申请日:2017-02-21
Applicant: International Business Machines Corporation
Inventor: KARL R. ERICKSON , PHIL C. PAONE , DAVID P. PAULSEN , JOHN E. SHEETS, II , GREGORY J. UHLMANN
IPC: G06F7/483 , G01R19/165
CPC classification number: G06F7/483 , G01R19/2506 , G01R31/2851 , G05B19/41 , G06F7/00 , H03M1/361
Abstract: Optimizing data approximation analysis using low power circuitry including receiving a plurality of data bits each corresponding to a binary indication of a test result; placing each of the plurality of data bits on an approximation circuit, wherein each of the data bits is placed on the approximation circuit by applying, to a first capacitor during a set time period, a voltage corresponding to the data bit, and wherein placing each of the plurality of data bits on the approximation circuit results in a resulting voltage stored on the first capacitor; and determining a potential correlation of the test results by comparing the resulting voltage to a voltage threshold.
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公开(公告)号:US20180350422A1
公开(公告)日:2018-12-06
申请号:US16000207
申请日:2018-06-05
Applicant: International Business Machines Corporation
Inventor: KARL R. ERICKSON , PHIL C. PAONE , GEORGE F. PAULIK , DAVID P. PAULSEN , JOHN E. SHEETS, II , GREGORY J. UHLMANN
CPC classification number: G11C11/24 , G11C7/1084 , G11C7/1087 , G11C7/1093 , G11C11/40 , G11C29/021 , G11C29/028 , G11C29/50004 , G11C29/50008 , G11C2029/0403 , G11C2029/5004 , G11C2207/2254
Abstract: Optimizing data approximation analysis using low power circuitry including receiving a first set of data results and a second set of data results; charging a first capacitor on the circuit with a unit of charge for each of the first set of data results that indicates a positive data point; charging a second capacitor on the circuit with the unit of charge for each of the second set of data results that indicates a positive data point; applying a voltage from the first capacitor and a voltage from the second capacitor to a FET on the circuit, wherein a current flows through the FET toward an output of the circuit if the voltage on the first capacitor is greater than the voltage on the second capacitor and a difference in the voltage of the first capacitor and the second capacitor is greater than a threshold voltage of the FET.
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公开(公告)号:US20180348274A1
公开(公告)日:2018-12-06
申请号:US15820301
申请日:2017-11-21
Applicant: International Business Machines Corporation
Inventor: KARL R. ERICKSON , PHIL C. PAONE , GEORGE F. PAULIK , DAVID P. PAULSEN , RAYMOND A. RICHETTA , JOHN E. SHEETS, II , GREGORY J. UHLMANN
Abstract: Real time cognitive monitoring of correlations between variables including receiving, by a circuit, a first set of data results and a second set of data results, wherein each set of data results comprises binary data points; adding a unit of charge to a collection capacitor on the circuit for each of the first set of data results that indicates a positive data point; removing a unit of charge from the collection capacitor for each of the second set of data results that indicates a positive data point; and triggering a first sense amp on the circuit if the charge on the collection capacitor exceeds a high charge threshold, indicating that the positive data points in the first set of data results is greater than the positive data points in the second set of data results to a first statistical significance.
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公开(公告)号:US20180350423A1
公开(公告)日:2018-12-06
申请号:US16001420
申请日:2018-06-06
Applicant: International Business Machines Corporation
Inventor: KARL R. ERICKSON , PHIL C. PAONE , GEORGE F. PAULIK , DAVID P. PAULSEN , JOHN E. SHEETS, II , GREGORY J. UHLMANN
CPC classification number: G11C11/24 , G11C7/1084 , G11C7/1087 , G11C7/1093 , G11C11/40 , G11C29/021 , G11C29/028 , G11C29/50004 , G11C29/50008 , G11C2029/0403 , G11C2029/5004 , G11C2207/2254
Abstract: Optimizing data approximation analysis using low power circuitry including receiving a first set of data results and a second set of data results; charging a first capacitor on the circuit with a unit of charge for each of the first set of data results that indicates a positive data point; charging a second capacitor on the circuit with the unit of charge for each of the second set of data results that indicates a positive data point; applying a voltage from the first capacitor and a voltage from the second capacitor to a FET on the circuit, wherein a current flows through the FET toward an output of the circuit if the voltage on the first capacitor is greater than the voltage on the second capacitor and a difference in the voltage of the first capacitor and the second capacitor is greater than a threshold voltage of the FET.
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公开(公告)号:US20180349774A1
公开(公告)日:2018-12-06
申请号:US15612272
申请日:2017-06-02
Applicant: International Business Machines Corporation
Inventor: KARL R. ERICKSON , PHIL C. PAONE , GEORGE F. PAULIK , DAVID P. PAULSEN , JOHN E. SHEETS, II , GREGORY J. UHLMANN
Abstract: Real time cognitive reasoning using a circuit with varying confidence level alerts including receiving a first set of data results and a second set of data results; transferring a first unit of charge from a first charge capacitor on the A-B circuit to a collection capacitor on the A-B circuit for each of the first set of data results that indicates a positive data point; transferring a second unit of charge from a second charge capacitor to the collection capacitor for each of the second set of data results that indicates a positive data point; and triggering a first sense amp on the A-B circuit if the charge on the collection capacitor exceeds a first charge threshold, indicating that the positive data points in the first set of data results is greater than the positive data points in the second set of data results to a first statistical significance with a first confidence level.
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公开(公告)号:US20180348273A1
公开(公告)日:2018-12-06
申请号:US15818929
申请日:2017-11-21
Applicant: International Business Machines Corporation
Inventor: KARL R. ERICKSON , PHIL C. PAONE , GEORGE F. PAULIK , DAVID P. PAULSEN , RAYMOND A. RICHETTA , JOHN E. SHEETS, II , GREGORY J. UHLMANN
Abstract: Cognitive analysis using applied analog circuits including receiving, by a circuit, a first set of data results and a second set of data results; charging a first capacitor on the circuit with a first unit of charge for each of the first set of data results that indicates a positive data point; charging a second capacitor on the circuit with a second unit of charge for each of the second set of data results that indicates a positive data point; applying a charge from the first capacitor and a charge from the second capacitor to an analog unit of the circuit; and generating a signal on a circuit output indicating that a ratio of the positive data points in the first set of data results to the positive data points in the second set of data results is greater than a statistical significance.
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公开(公告)号:US20180349775A1
公开(公告)日:2018-12-06
申请号:US15818977
申请日:2017-11-21
Applicant: International Business Machines Corporation
Inventor: KARL R. ERICKSON , PHIL C. PAONE , GEORGE F. PAULIK , DAVID P. PAULSEN , JOHN E. SHEETS, II , GREGORY J. UHLMANN
Abstract: Real time cognitive reasoning using a circuit with varying confidence level alerts including receiving a first set of data results and a second set of data results; transferring a first unit of charge from a first charge capacitor on the A-B circuit to a collection capacitor on the A-B circuit for each of the first set of data results that indicates a positive data point; transferring a second unit of charge from a second charge capacitor to the collection capacitor for each of the second set of data results that indicates a positive data point; and triggering a first sense amp on the A-B circuit if the charge on the collection capacitor exceeds a first charge threshold, indicating that the positive data points in the first set of data results is greater than the positive data points in the second set of data results to a first statistical significance with a first confidence level.
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公开(公告)号:US20180348272A1
公开(公告)日:2018-12-06
申请号:US15612433
申请日:2017-06-02
Applicant: International Business Machines Corporation
Inventor: KARL R. ERICKSON , PHIL C. PAONE , GEORGE F. PAULIK , DAVID P. PAULSEN , RAYMOND A. RICHETTA , JOHN E. SHEETS, II , GREGORY J. UHLMANN
Abstract: Real time cognitive monitoring of correlations between variables including receiving, by a circuit, a first set of data results and a second set of data results, wherein each set of data results comprises binary data points; adding a unit of charge to a collection capacitor on the circuit for each of the first set of data results that indicates a positive data point; removing a unit of charge from the collection capacitor for each of the second set of data results that indicates a positive data point; and triggering a first sense amp on the circuit if the charge on the collection capacitor exceeds a high charge threshold, indicating that the positive data points in the first set of data results is greater than the positive data points in the second set of data results to a first statistical significance.
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