公开(公告)号：US10158464B2

公开(公告)日：2018-12-18

申请号：US14864995

申请日：2015-09-25

申请人： Intel IP Corporation

发明人： Dae Jung Yoon ,  Bertram Gunzelmann ,  Ansgar Scherb

IPC分类号： H04W72/04 ,  H04L5/00 ,  H04B7/024 ,  H04B7/06 ,  H04L27/26

摘要： A mobile terminal device may include a receiver circuit and a processing circuit. The receiver circuit may be configured to receive a composite signal comprising a plurality of reference signal patterns associated with a plurality of transmit locations. The processing circuit may be configured to identify a first reference signal pattern and a second reference signal pattern from the plurality of reference signal patterns; generate a first offset estimate and a second offset estimate based on the first reference signal pattern and the second reference signal pattern; determine a refined offset estimate based on the first offset estimate and the second offset estimate, wherein first offset estimate has a greater offset estimation range than the second offset estimate.

公开(公告)号：US20170093538A1

公开(公告)日：2017-03-30

申请号：US14864995

申请日：2015-09-25

申请人： Intel IP Corporation

发明人： Dae Jung Yoon ,  Bertram Gunzelmann ,  Ansgar Scherb

IPC分类号： H04L5/00 ,  H04B7/06 ,  H04L27/26 ,  H04B7/02

CPC分类号： H04L5/0048 ,  H04B7/024 ,  H04B7/0626 ,  H04L5/0035 ,  H04L27/2613

摘要： A mobile terminal device may include a receiver circuit and a processing circuit. The receiver circuit may be configured to receive a composite signal comprising a plurality of reference signal patterns associated with a plurality of transmit locations. The processing circuit may be configured to identify a first reference signal pattern and a second reference signal pattern from the plurality of reference signal patterns; generate a first offset estimate and a second offset estimate based on the first reference signal pattern and the second reference signal pattern; determine a refined offset estimate based on the first offset estimate and the second offset estimate, wherein first offset estimate has a greater offset estimation range than the second offset estimate.

公开(公告)号：US09832747B2

公开(公告)日：2017-11-28

申请号：US14859404

申请日：2015-09-21

申请人： Intel IP Corporation

发明人： Dae Jung Yoon ,  Bertram Gunzelmann ,  Ansgar Scherb

IPC分类号： H04L1/00 ,  H04W56/00 ,  H04W4/02 ,  H04L5/00

CPC分类号： H04W56/001 ,  H04L5/0007 ,  H04W4/02

摘要： A mobile terminal device includes a receiver circuit and a processing circuit. The receiver circuit is configured to receive a plurality of reference signal patterns from a plurality of transmission locations, wherein each of the plurality of reference signal patterns corresponds to a respective transmission location of the plurality of transmission locations. The processing circuit is configured to determine a synchronization offset estimate for each of the plurality of transmission locations based on the plurality of reference signal patterns to generate a plurality of synchronization offset estimates; determine if a minimum-valued synchronization offset estimate of the plurality of synchronization offset estimates satisfies predefined criteria; and determine a reception time window for processing data based on the minimum-valued synchronization offset estimate if the minimum-valued synchronization offset estimate satisfies the predefined criteria.