公开(公告)号：US20210011730A1

公开(公告)日：2021-01-14

申请号：US16937132

申请日：2020-07-23

Applicant: Intel Corporation

Inventor： Prasoonkumar Surti ,  Abhishek R. Appu ,  Joydeep Ray ,  Subramaniam M. Malyuran ,  Altug Koker

IPC: G06F9/38 ,  G06F12/0875 ,  G06T1/20 ,  G06F12/06 ,  G06T1/60 ,  G06T15/00 ,  H04N19/423 ,  H04N19/436 ,  G06F9/30 ,  G06F9/50 ,  G09G5/393

Abstract: An apparatus to facilitate memory tiling is disclosed. The apparatus includes a memory, one or more execution units (EUs) to execute a plurality of processing threads via access to the memory and tiling logic to apply a tiling pattern to memory addresses for data stored in the memory.