公开(公告)号：US20170091655A1

公开(公告)日：2017-03-30

申请号：US14865124

申请日：2015-09-25

Applicant: Intel Corporation

Inventor： Tsung-Han Lin ,  Gokce Keskin ,  Hsiang-Tsung Kung ,  She-Hwa Yen ,  Hong Wang

IPC: G06N99/00

CPC classification number: G06N20/00 ,  G06F9/3836 ,  G06F15/76

Abstract: A processor includes a front end to decode an instruction, an allocator to pass the instruction to a nearest neighbor logic unit (NNLU) to execute the instruction, and a retirement unit to retire the instruction. The NNLU includes logic to determine input of the instruction for which nearest neighbors will be calculated, transform the input, retrieve candidate atoms for which the nearest neighbors will be calculated, compute distance between the candidate atoms and the input, and determine the nearest neighbors for the input based upon the computed distance.

公开(公告)号：US10387797B2

公开(公告)日：2019-08-20

申请号：US14865124

申请日：2015-09-25

Applicant: Intel Corporation

Inventor： Tsung-Han Lin ,  Gokce Keskin ,  Hsiang-Tsung Kung ,  She-Hwa Yen ,  Hong Wang

IPC: G06F15/18 ,  G06N20/00 ,  G06F9/30

Abstract: A processor includes a front end to decode an instruction, an allocator to pass the instruction to a nearest neighbor logic unit (NNLU) to execute the instruction, and a retirement unit to retire the instruction. The NNLU includes logic to determine input of the instruction for which nearest neighbors will be calculated, transform the input, retrieve candidate atoms for which the nearest neighbors will be calculated, compute distance between the candidate atoms and the input, and determine the nearest neighbors for the input based upon the computed distance.