公开(公告)号：US20230195918A1

公开(公告)日：2023-06-22

申请号：US17645070

申请日：2021-12-20

申请人： Intel Corporation

发明人： Stanley Chen ,  Vivek Garg ,  Ankush Varma ,  Eric J. Dehaemer ,  Johan van de Groenendaal

IPC分类号： G06F21/62 ,  G06F9/30

CPC分类号： G06F21/6218 ,  G06F9/30101

摘要： In an embodiment, a processor may include at least one processing engine to execute instructions, and a register interface circuit coupled to the at least one processing engine. The register interface circuit may be to: receive a request to access a register associated with a feature of the processor; determine whether the requested access is authorized based at least in part on an entry of an access structure, the access structure to store a plurality of entries associated with a plurality of features of the processor; and in response to a determination that the requested access is authorized by the access structure, perform the requested access of the register associated with the feature. Other embodiments are described and claimed.