公开(公告)号：US20230315575A1

公开(公告)日：2023-10-05

申请号：US17711465

申请日：2022-04-01

Applicant: Intel Corporation

Inventor： Sarathy Jayakumar ,  Eswar Konduru ,  John Holm

IPC: G06F11/14 ,  G06F9/445 ,  G06F21/57

CPC classification number: G06F11/142 ,  G06F9/445 ,  G06F21/572 ,  G06F2221/033 ,  G06F2201/805

Abstract: Techniques and mechanisms for supporting machine check functionality with a handler which is implemented in firmware. In an embodiment, a processor executes first firmware code to implement a machine check event (MCE) detector. The MCE detector detects a hardware error of a platform which includes the processor, and generates a call to invoke an MCE handler which the processor implements by executing second firmware code. The MCE handler is called, outside of a software context, to attempt a recovery from the hardware error. The call is performed independent of any system management interrupt being based on the detected hardware error. In another embodiment, another MCE handler of an operating system is conditionally invoked where it is determined that the attempted recovery by the first MCE handler was unsuccessful.