公开(公告)号：US20240106139A1

公开(公告)日：2024-03-28

申请号：US17955369

申请日：2022-09-28

Applicant: Intel Corporation

Inventor： Jiun Hann SIR ,  Eng Huat GOH ,  Poh Boon KHOO ,  Chin Mian CHOONG ,  Jooi Wah WONG ,  Jia Yun WONG

IPC: H01R12/57 ,  H01L25/065 ,  H01L25/10 ,  H01R12/52 ,  H01R12/79 ,  H01R13/03 ,  H01R13/508 ,  H01R43/20

CPC classification number: H01R12/57 ,  H01L25/0652 ,  H01L25/105 ,  H01R12/526 ,  H01R12/79 ,  H01R13/03 ,  H01R13/508 ,  H01R43/205 ,  H01L24/16

Abstract: Embodiments herein relate to systems, apparatuses, or processes for a connector for a modular memory package that includes one or more memory dies on a substrate, where the connector directly electrically couples electrical contacts at an edge and on each side the substrate of the memory package to electrical contacts at an edge and on each side of another substrate that includes a compute die. The connector may include a first plurality of leads that are substantially parallel with each other, and a second plurality of leads that are substantially parallel with each other that are below the first plurality of leads and electrically couple the two substrates. Other embodiments may be described and/or claimed.