公开(公告)号：US20230385220A1

公开(公告)日：2023-11-30

申请号：US18250325

申请日：2020-11-24

Applicant: Intel Corporation

Inventor： Zhuangzhi Li ,  Jie Bai ,  Di Zhang ,  Changcheng Liu ,  Zhonghua Sun

IPC: G06F13/40 ,  G06F13/16 ,  G06F13/42

CPC classification number: G06F13/4022 ,  G06F13/4081 ,  G06F13/1663 ,  G06F13/4221

Abstract: Systems, apparatuses and methods may provide for technology that collects, by a BIOS (basic input output system), memory information from a first host path to a coherent device memory on a memory expander, wherein the memory expander includes a plurality of host paths, transfers the memory information from the BIOS to an OS (operating system) via one or more OS interface tables, and initializes, by the OS, the memory expander based on the memory information, wherein the memory information includes memory capabilities and configuration settings associated with the memory expander.

公开(公告)号：US12271329B2

公开(公告)日：2025-04-08

申请号：US18250325

申请日：2020-11-24

Applicant: Intel Corporation

Inventor： Zhuangzhi Li ,  Jie Bai ,  Di Zhang ,  Changcheng Liu ,  Zhonghua Sun

IPC: G06F13/40 ,  G06F13/16 ,  G06F13/42

Abstract: Systems, apparatuses and methods may provide for technology that collects, by a BIOS (basic input output system), memory information from a first host path to a coherent device memory on a memory expander, wherein the memory expander includes a plurality of host paths, transfers the memory information from the BIOS to an OS (operating system) via one or more OS interface tables, and initializes, by the OS, the memory expander based on the memory information, wherein the memory information includes memory capabilities and configuration settings associated with the memory expander.

公开(公告)号：US20220105954A1

公开(公告)日：2022-04-07

申请号：US17430400

申请日：2019-03-12

Applicant: Intel Corporation

Inventor： Fei Li ,  Wenlong Yang ,  Jiao Zuo ,  Chuansheng Liu ,  Changcheng Liu ,  Zhuangzhi Li ,  Zhen Han

IPC: B60W60/00 ,  B60W30/165 ,  H04W4/46

Abstract: Systems, apparatuses and methods may provide for technology that sends first operation instructions to a first platoon of autonomous vehicles positioned behind a first lead vehicle, wherein the first operation instructions correspond to a manual operation of the first lead vehicle. The technology may also establish a direct communications link between the first lead vehicle and a second lead vehicle positioned ahead of the first lead vehicle, wherein the second lead vehicle is to be associated with a second platoon of autonomous vehicles. Additionally, the technology broadcasts second operation instructions from the direct communications link to the first platoon of autonomous vehicles while the first lead vehicle is in an autonomous mode, wherein the second operation instructions correspond to a manual operation of the second lead vehicle. The technology may also discontinue the direct communications link between the first lead vehicle and the second lead vehicle.