METHOD FOR FABRICATING A SEMICONDUCTOR PACKAGE, SEMICONDUCTOR PACKAGE AND EMBEDDED PCB MODULE

    公开(公告)号:US20210313273A1

    公开(公告)日:2021-10-07

    申请号:US17208363

    申请日:2021-03-22

    Abstract: A method for fabricating a semiconductor package includes: providing a semiconductor wafer having opposing first and second sides, the semiconductor wafer being arranged on a first carrier such that the second side of the wafer faces the carrier; masking sawing lines on the first side of the semiconductor wafer with a mask; depositing a first metal layer on the masked first side of the semiconductor wafer by cold spraying or by high velocity oxygen fuel spraying or by cold plasma assisted deposition, such that the first metal layer does not cover the sawing lines, the deposited first metal layer having a thickness of 50 μm or more; singulating the semiconductor wafer into a plurality of semiconductor dies by sawing the semiconductor wafer along the sawing lines; and encapsulating the plurality of semiconductor dies with an encapsulant such that the first metal layer is exposed on a first side of the encapsulant.

    SEMICONDUCTOR DEVICE HAVING A SEMICONDUCTOR DIE EMBEDDED IN A MOLDING COMPOUND

    公开(公告)号:US20210217633A1

    公开(公告)日:2021-07-15

    申请号:US17217473

    申请日:2021-03-30

    Abstract: A semiconductor device includes: a first semiconductor die having opposing first and second main surfaces and an edge between the first and second main surfaces; a molding compound covering the edge and a peripheral part of the first main surface of the first semiconductor die, the molding compound including a resin and filler particles embedded within the resin; and a first opening in the molding compound which exposes a first part of the first main surface of the first semiconductor die from the molding compound, the first part being positioned inward from the peripheral part, wherein the first opening in the molding compound has a sidewall, wherein predominantly all of the filler particles disposed along the sidewall of the first opening are fully embedded within the resin and not exposed at all along the sidewall. A semiconductor structure including a semiconductor wafer or panel is also described.

    Temporary post-assisted embedding of semiconductor dies

    公开(公告)号:US11004700B2

    公开(公告)日:2021-05-11

    申请号:US16546913

    申请日:2019-08-21

    Abstract: A method includes: providing a semiconductor die having a first main surface, a second main surface opposite the first main surface, and an edge between the first main surface and the second main surface; applying a temporary spacer to a first part of the first main surface of the semiconductor die, the first part being positioned inward from a peripheral part of the first main surface; after applying the temporary spacer, embedding the semiconductor die at least partly in an embedding material, the embedding material covering the edge and the peripheral part of the first main surface of the semiconductor die and contacting a sidewall of the temporary spacer; and after the embedding, removing the temporary spacer from the first main surface of the semiconductor die to expose the first part of the first main surface of the semiconductor die. A semiconductor device produced by the method is also provided.

    Method for fabricating a semiconductor package, semiconductor package and embedded PCB module

    公开(公告)号:US11562967B2

    公开(公告)日:2023-01-24

    申请号:US17208363

    申请日:2021-03-22

    Abstract: A method for fabricating a semiconductor package includes: providing a semiconductor wafer having opposing first and second sides, the semiconductor wafer being arranged on a first carrier such that the second side of the wafer faces the carrier; masking sawing lines on the first side of the semiconductor wafer with a mask; depositing a first metal layer on the masked first side of the semiconductor wafer by cold spraying or by high velocity oxygen fuel spraying or by cold plasma assisted deposition, such that the first metal layer does not cover the sawing lines, the deposited first metal layer having a thickness of 50 μm or more; singulating the semiconductor wafer into a plurality of semiconductor dies by sawing the semiconductor wafer along the sawing lines; and encapsulating the plurality of semiconductor dies with an encapsulant such that the first metal layer is exposed on a first side of the encapsulant.

    Temporary Post-Assisted Embedding of Semiconductor Dies

    公开(公告)号:US20210057234A1

    公开(公告)日:2021-02-25

    申请号:US16546913

    申请日:2019-08-21

    Abstract: A method includes: providing a semiconductor die having a first main surface, a second main surface opposite the first main surface, and an edge between the first main surface and the second main surface; applying a temporary spacer to a first part of the first main surface of the semiconductor die, the first part being positioned inward from a peripheral part of the first main surface; after applying the temporary spacer, embedding the semiconductor die at least partly in an embedding material, the embedding material covering the edge and the peripheral part of the first main surface of the semiconductor die and contacting a sidewall of the temporary spacer; and after the embedding, removing the temporary spacer from the first main surface of the semiconductor die to expose the first part of the first main surface of the semiconductor die. A semiconductor device produced by the method is also provided.

Patent Agency Ranking