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公开(公告)号:US11217661B2
公开(公告)日:2022-01-04
申请号:US16842589
申请日:2020-04-07
Applicant: Industrial Technology Research Institute
Inventor: Yu-De Lin , Heng-Yuan Lee , Po-Chun Yeh , Chih-Yao Wang , Hsin-Yun Yang
IPC: H01L49/02 , H01L27/11502 , H01L27/11507 , G11C11/22
Abstract: A ferroelectric memory is provided. The ferroelectric memory includes a substrate, a first conductive layer disposed on the substrate, a patterned oxide layer disposed on the first conductive layer and the substrate, exposing a part of the first conductive layer, a second conductive layer disposed on the exposed first conductive layer and the patterned oxide layer, an antiferroelectric layer disposed on the exposed first conductive layer and the second conductive layer, a ferroelectric layer disposed on the second conductive layer and located on the antiferroelectric layer, a conductive oxide layer disposed between the antiferroelectric layer, and a third conductive layer disposed on the conductive oxide layer and between the ferroelectric layer.
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公开(公告)号:US11017830B1
公开(公告)日:2021-05-25
申请号:US16907101
申请日:2020-06-19
Applicant: Industrial Technology Research Institute
Inventor: Yu-De Lin , Heng-Yuan Lee , Po-Chun Yeh , Hsin-Yun Yang
IPC: G11C11/22
Abstract: A ferroelectric memory is provided. The ferroelectric memory includes a first electrode layer having a dominant crystallographic orientation of (110) or (220), a second electrode layer opposite the first electrode layer, wherein the second electrode layer has a dominant crystallographic orientation of (110) or (220), and a ferroelectric layer disposed between the first electrode layer and the second electrode layer, wherein the ferroelectric layer has a dominant crystallographic orientation of (111).
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公开(公告)号:US10833091B2
公开(公告)日:2020-11-10
申请号:US16270706
申请日:2019-02-08
Applicant: Industrial Technology Research Institute
Inventor: Yu-De Lin , Heng-Yuan Lee , Po-Chun Yeh , Chih-Yao Wang , Hsin-Yun Yang
IPC: H01L27/11507 , G11C11/22 , H01L49/02
Abstract: A ferroelectric memory is provided. The ferroelectric memory includes a first electrode, a second electrode opposite to the first electrode, at least one ferroelectric layer disposed between the first electrode and the second electrode, and at least one antiferroelectric layer disposed between the first electrode and the second electrode, wherein the antiferroelectric layer is in contact with the ferroelectric layer.
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