公开(公告)号：US20190318966A1

公开(公告)日：2019-10-17

申请号：US16454178

申请日：2019-06-27

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Takashi Ando ,  Balaji Kannan ,  Siddarth Krishnan ,  Unoh Kwon ,  Shahab Siddiqui

IPC: H01L21/8238 ,  H01L27/092 ,  H01L29/49 ,  H01L21/28 ,  H01L29/66 ,  H01L29/51 ,  H01L29/423 ,  H01L21/225

Abstract: A integrated circuit including an n-doped high-k dielectric layer conformally within a first opening in a dielectric layer such that the n-doped high-k dielectric layer is in direct contact with a portion of a substrate exposed at a bottom of the first opening, a p-doped high-k dielectric layer conformally within a second opening in the dielectric layer such that the p-doped high-k dielectric layer is in direct contact with a portion of the substrate exposed at a bottom of the second opening, a shared work function metal conformally within the first opening and the second opening above and in direct contact with both the p-doped high-k dielectric layer and the n-doped high-k dielectric layer, and a bulk fill material above and in direct contact with the shared work function metal.

公开(公告)号：US09515164B2

公开(公告)日：2016-12-06

申请号：US14198976

申请日：2014-03-06

Applicant: International Business Machines Corporation

Inventor： Takashi Ando ,  Balaji Kannan ,  Siddarth Krishnan ,  Unoh Kwon ,  Shahab Siddiqui

IPC: H01L29/66 ,  H01L21/28 ,  H01L29/51 ,  H01L29/49 ,  H01L21/8238 ,  H01L27/092

CPC classification number: H01L21/823828 ,  H01L21/225 ,  H01L21/28088 ,  H01L21/28185 ,  H01L21/28238 ,  H01L21/823842 ,  H01L21/823857 ,  H01L27/092 ,  H01L29/42372 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545

Abstract: A method for forming a replacement metal gate structure sharing a single work function metal for both the N-FET and the P-FET gates. The method oppositely dopes a high-k material of the N-FET and P-FET gate, respectively, using a single lithography step. The doping allows use of a single work function metal which in turn provides more space in the metal gate opening so that a bulk fill material may occupy more volume of the opening resulting in a lower resistance gate.

Abstract translation: 一种用于形成与N-FET和P-FET栅极共用单个功函数金属的替代金属栅极结构的方法。 该方法分别使用单个光刻步骤来掺杂N-FET和P-FET栅极的高k材料。 掺杂允许使用单个功函金属，其又在金属栅极开口中提供更多的空间，使得块体填充材料可占据更多开口的体积，导致较低电阻门。

公开(公告)号：US20160163603A1

公开(公告)日：2016-06-09

申请号：US14562991

申请日：2014-12-08

Applicant: International Business Machines Corporation

Inventor： Ruqiang Bao ,  Siddarth Krishnan ,  Unoh Kwon ,  Keith Kwong Hon Wong

IPC: H01L21/8238 ,  H01L29/49 ,  H01L21/28

CPC classification number: H01L21/823842 ,  H01L21/28088 ,  H01L21/28167 ,  H01L21/28194 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

Abstract: A method of forming a transistor device includes forming an interfacial layer and a dielectric layer over a substrate; and forming a p-type field effect transistor (PFET) workfunction metal layer over the dielectric layer, the workfunction metal layer comprising a lower titanium nitride (TiN) first layer and a second layer including one of titanium-aluminum-carbide (TiAlC) and tantalum-aluminum-carbide (TaAlC) formed on the lower TiN first layer.

Abstract translation: 形成晶体管器件的方法包括在衬底上形成界面层和电介质层; 在所述电介质层上形成p型场效应晶体管（PFET）功函数金属层，所述功函数金属层包括下氮化钛（TiN）第一层和包含钛 - 碳化铝（TiAlC）和 形成在下部TiN第一层上的钽 - 碳化铝（TaAlC）。

公开(公告)号：US10395993B2

公开(公告)日：2019-08-27

申请号：US15284567

申请日：2016-10-04

Applicant: International Business Machines Corporation

Inventor： Takashi Ando ,  Balaji Kannan ,  Siddarth Krishnan ,  Unoh Kwon ,  Shahab Siddiqui

IPC: H01L21/28 ,  H01L29/49 ,  H01L29/51 ,  H01L29/66 ,  H01L21/225 ,  H01L27/092 ,  H01L29/423 ,  H01L21/8238

Abstract: A method for forming a replacement metal gate structure sharing a single work function metal for both the N-FET and the P-FET gates. The method oppositely dopes a high-k material of the N-FET and P-FET gate, respectively, using a single lithography step. The doping allows use of a single work function metal which in turn provides more space in the metal gate opening so that a bulk fill material may occupy more volume of the opening resulting in a lower resistance gate.

公开(公告)号：US20170025315A1

公开(公告)日：2017-01-26

申请号：US15284567

申请日：2016-10-04

Applicant: International Business Machines Corporation

Inventor： Takashi Ando ,  Balaji Kannan ,  Siddarth Krishnan ,  Unoh Kwon ,  Shahab Siddiqui

IPC: H01L21/8238 ,  H01L29/423 ,  H01L27/092 ,  H01L29/49 ,  H01L21/225 ,  H01L29/51 ,  H01L29/66 ,  H01L21/28

CPC classification number: H01L21/823828 ,  H01L21/225 ,  H01L21/28088 ,  H01L21/28185 ,  H01L21/28238 ,  H01L21/823842 ,  H01L21/823857 ,  H01L27/092 ,  H01L29/42372 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545

Abstract: A method for forming a replacement metal gate structure sharing a single work function metal for both the N-FET and the P-FET gates. The method oppositely dopes a high-k material of the N-FET and P-FET gate, respectively, using a single lithography step. The doping allows use of a single work function metal which in turn provides more space in the metal gate opening so that a bulk fill material may occupy more volume of the opening resulting in a lower resistance gate.

Abstract translation: 一种用于形成与N-FET和P-FET栅极共用单个功函数金属的替代金属栅极结构的方法。 该方法分别使用单个光刻步骤来掺杂N-FET和P-FET栅极的高k材料。 掺杂允许使用单个功函金属，其又在金属栅极开口中提供更多的空间，使得块体填充材料可占据更多开口的体积，导致较低电阻门。

公开(公告)号：US20150255463A1

公开(公告)日：2015-09-10

申请号：US14198976

申请日：2014-03-06

Applicant: International Business Machines Corporation

Inventor： Takashi Ando ,  Balaji Kannan ,  Siddarth Krishnan ,  Unoh Kwon ,  Shahab Siddiqui

IPC: H01L27/092 ,  H01L29/20 ,  H01L29/66 ,  H01L29/36

CPC classification number: H01L21/823828 ,  H01L21/225 ,  H01L21/28088 ,  H01L21/28185 ,  H01L21/28238 ,  H01L21/823842 ,  H01L21/823857 ,  H01L27/092 ,  H01L29/42372 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545

Abstract: A method for forming a replacement metal gate structure sharing a single work function metal for both the N-FET and the P-FET gates. The method oppositely dopes a high-k material of the N-FET and P-FET gate, respectively, using a single lithography step. The doping allows use of a single work function metal which in turn provides more space in the metal gate opening so that a bulk fill material may occupy more volume of the opening resulting in a lower resistance gate.

Abstract translation: 一种用于形成与N-FET和P-FET栅极共用单个功函数金属的替代金属栅极结构的方法。 该方法分别使用单个光刻步骤来掺杂N-FET和P-FET栅极的高k材料。 掺杂允许使用单个功函金属，其又在金属栅极开口中提供更多的空间，使得块体填充材料可占据更多开口的体积，导致较低电阻门。