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1.发明授权公开(公告)号：US11822482B2
公开(公告)日：2023-11-21
申请号：US18054539
申请日：2022-11-10
发明人： Lokesh Mohan Gupta , Kyler A. Anderson , Kevin J. Ash , Matthew J. Kalos , Brian Anthony Rinaldi , Beth Ann Peterson , Matthew G. Borlick
IPC分类号： G06F12/08 , G06F12/0891 , G06F3/06 , G06F12/02
CPC分类号： G06F12/0891 , G06F3/0619 , G06F3/0659 , G06F3/0679 , G06F12/0246
摘要： Provided are a computer program product for managing tracks in a storage in a cache. An active track data structure indicates tracks in the cache that have an active status. An active bit in a cache control block for a track is set to indicate active for the track indicated as active in the active track data structure. In response to processing the cache control block, a determination is made, from the cache control block for the track, whether the track is active or inactive to determine processing for the cache control block.
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公开(公告)号：US11704209B2
公开(公告)日：2023-07-18
申请号：US17649797
申请日：2022-02-02
IPC分类号： G06F11/20 , G06F12/0871 , G06F12/123 , G06F12/0842 , G06F11/07
CPC分类号： G06F11/2092 , G06F11/2007 , G06F11/2012 , G06F12/0842 , G06F12/0871 , G06F12/123 , G06F11/0757 , G06F2201/805 , G06F2201/81 , G06F2212/1024 , G06F2212/313 , G06F2212/462 , G06F2212/466 , G06F2212/601
摘要： Provided are a computer program product, system, and method for using a track format code in a cache control block for a track in a cache to process read and write requests to the track in the cache. A track format table associates track format codes with track format metadata. A determination is made as to whether the track format table has track format metadata matching track format metadata of a track staged into the cache. A determination is made as to whether a track format code from the track format table for the track format metadata in the track format table matches the track format metadata of the track staged. A cache control block for the track being added to the cache is generated including the determined track format code when the track format table has the matching track format metadata.
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公开(公告)号：US11620219B2
公开(公告)日：2023-04-04
申请号：US16953046
申请日：2020-11-19
IPC分类号： G06F12/0804 , G06F12/121 , G06F12/0868
摘要： In one embodiment, storage drive dependent track removal processing logic performs destage tasks for tracks cached in a cache as a function of whether the storage drive is classified as a fast class or as slow class of storage drives, for example. In one embodiment, a destage task configured for a slow class storage drive, transfers an entry for a track selected for destaging from a main cache list to a wait cache list to await destaging to the slow class drive. A destage task configured for a fast class storage drive allows the cache list entry for the selected track to remain on the main cache list while the selected track is being destaged to the fast class storage drive, thereby bypassing the transfer of the entry to a wait cache list. Other features and aspects may be realized, depending upon the particular application.
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4.发明授权公开(公告)号：US11550726B1
公开(公告)日：2023-01-10
申请号：US17389315
申请日：2021-07-29
发明人： Lokesh Mohan Gupta , Kyler A. Anderson , Kevin J. Ash , Matthew J. Kalos , Brian Anthony Rinaldi , Beth Ann Peterson , Matthew G. Borlick
IPC分类号： G06F12/08 , G06F12/0891 , G06F12/02 , G06F3/06
摘要： Provided are a computer program product for managing tracks in a storage in a cache. An active track data structure indicates tracks in the cache that have an active status. An active bit in a cache control block for a track is set to indicate active for the track indicated as active in the active track data structure. In response to processing the cache control block, a determination is made, from the cache control block for the track, whether the track is active or inactive to determine processing for the cache control block.
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公开(公告)号：US11379329B2
公开(公告)日：2022-07-05
申请号：US16744083
申请日：2020-01-15
IPC分类号： G06F11/00 , G06F11/22 , G06F11/16 , G06F12/0875 , G06F11/20
摘要： A first server of a storage controller is configured to communicate with a host via a first bus interface, and a second server of the storage controller is configured to communicate with the host via a second bus interface. Data is written from the host via the first bus interface to a cache of the first server and via the second bus interface to a non-volatile storage of the second server. The data stored in the cache of the first server is periodically compared to the data stored in the non-volatile storage of the second server.
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公开(公告)号：US20220188235A1
公开(公告)日：2022-06-16
申请号：US17119470
申请日：2020-12-11
IPC分类号： G06F12/0846 , G06F3/06
摘要： A method for dynamically adjusting cache memory partition sizes within a storage system includes computing a read hit ratio for data accessed in each cache partition and an average read hit ratio for all the cache partitions over a time interval. The cache memory includes a higher performance portion (DRAM) and lower performance portion (SCM). The method increases or decreases the partition size for each cache partition by comparing the read hit ratio for the partition to the average read hit ratio for all the partitions. Each cache partition includes maximum and minimum partition sizes, and read hit and read access counters. The SCM portion of the cache memory includes cache partitions reserved for storing data of a specific type, or data used for a specific purpose or with a specific software application. A corresponding storage controller and computer program product are also disclosed.
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公开(公告)号：US11314659B2
公开(公告)日：2022-04-26
申请号：US15696037
申请日：2017-09-05
IPC分类号： G06F12/1045 , G06F12/0868 , G06F3/06 , G06F12/02 , G06F13/24 , G06F13/40 , G06F13/42
摘要： Provided are techniques for using real segments and alternate segments in Non-Volatile Storage (NVS). One or more write requests for a track are executed by alternating between storing data in one or more sectors of real segments and one or more sectors of alternate segments for each of the write requests, while setting indicators in a real sector structure and an alternate sector structure. In response to determining that the one or more write requests for the track have completed, the data stored in the one or more sectors of the real segments and in the one or more sectors of the alternate segments are merged to form newly written data. In response to determining that a hardened, previously written data of a track does exist in Non-Volatile Storage (NVS), the newly written data is merged with the hardened, previously written data in the NVS. The merged data is committed.
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8.发明授权公开(公告)号：US11314649B2
公开(公告)日：2022-04-26
申请号：US17133420
申请日：2020-12-23
IPC分类号： G06F12/0868 , G06F12/0871 , G06N20/00
摘要： In response to an end of track access for a track in a cache, a determination is made as to whether the track has modified data and whether the track has one or more holes. In response to determining that the track has modified data and the track has one or more holes, an input on a plurality of attributes of a computing environment in which the track is processed is provided to a machine learning module to produce an output value. A determination is made as to whether the output value indicates whether one or more holes are to be filled in the track. In response to determining that the output value indicates that one or more holes are to be filled in the track, the track is staged to the cache from a storage drive.
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公开(公告)号：US11281502B2
公开(公告)日：2022-03-22
申请号：US16798339
申请日：2020-02-22
摘要： A method for dispatching tasks on processor cores based on memory access efficiency is disclosed. The method identifies a task and a memory area to be accessed by the task. The method may use one or more of a compiler, code knowledge, and run-time statistics to identify the memory area that is accessed by the task. The method identifies multiple processor cores that are candidates to execute the task and identifies a particular processor core from the multiple processor cores that provides most efficient access to the memory area. The method dispatches the task to execute on the particular processor core that is deemed most efficient. A corresponding system and computer program product are also disclosed.
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公开(公告)号：US11151058B2
公开(公告)日：2021-10-19
申请号：US16748656
申请日：2020-01-21
IPC分类号： G06F12/126 , G06F12/0862 , G06F12/0897
摘要： Provided are a computer program product, system, and method for staging data from storage to a fast cache tier of a multi-tier cache in a non-adaptive sector caching mode in which data staged in response to a read request is limited to track sectors required to satisfy the read request. Data is also staged from storage to a slow cache tier of the multi-tier cache in a selected adaptive caching mode of a plurality of adaptive caching modes available for staging data of tracks. Adaptive caching modes are selected for the slow cache tier as a function of historical access ratios. Prestage requests for the slow cache tier are enqueued in one of a plurality of prestage request queues of various priority levels as a function of the selected adaptive caching mode and historical access ratios. Other aspects and advantages are provided, depending upon the particular application.
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