Semiconductor package floating metal checks

    公开(公告)号:US10423751B2

    公开(公告)日:2019-09-24

    申请号:US15719698

    申请日:2017-09-29

    Abstract: Embodiments of the invention include methods, systems, and computer program products for checking floating metals in a laminate structure. Aspects of the invention include receiving, by a processor, floating metal rules and a semiconductor package design having a plurality of laminate layers. Each laminate layer includes a plurality of metal shapes, a plurality of signal lines, and a plurality of vias. The metal shapes, signal lines, and vias are mapped to one or more cells in an array. The processor determines, for each cell corresponding to a metal shape, whether the plurality of vias satisfies the floating metal rules. The processor can suggest new vias to satisfy the floating metal rules.

    Semiconductor package floating metal checks

    公开(公告)号:US10949600B2

    公开(公告)日:2021-03-16

    申请号:US16539120

    申请日:2019-08-13

    Abstract: Embodiments of the invention include methods, systems, and computer program products for checking floating metals in a laminate structure. Aspects of the invention include receiving, by a processor, floating metal rules and a semiconductor package design having a plurality of laminate layers. Each laminate layer includes a plurality of metal shapes, a plurality of signal lines, and a plurality of vias. The metal shapes, signal lines, and vias are mapped to one or more cells in an array. The processor determines, for each cell corresponding to a metal shape, whether the plurality of vias satisfies the floating metal rules. The processor can suggest new vias to satisfy the floating metal rules.

    SEMICONDUCTOR PACKAGE FLOATING METAL CHECKS
    5.
    发明申请

    公开(公告)号:US20190102505A1

    公开(公告)日:2019-04-04

    申请号:US15719698

    申请日:2017-09-29

    CPC classification number: G06F17/5081 G06F17/5072 G06F2217/40

    Abstract: Embodiments of the invention include methods, systems, and computer program products for checking floating metals in a laminate structure. Aspects of the invention include receiving, by a processor, floating metal rules and a semiconductor package design having a plurality of laminate layers. Each laminate layer includes a plurality of metal shapes, a plurality of signal lines, and a plurality of vias. The metal shapes, signal lines, and vias are mapped to one or more cells in an array. The processor determines, for each cell corresponding to a metal shape, whether the plurality of vias satisfies the floating metal rules. The processor can suggest new vias to satisfy the floating metal rules.

Patent Agency Ranking