-
公开(公告)号:US11508829B2
公开(公告)日:2022-11-22
申请号:US16955085
申请日:2020-05-28
Applicant: INNOSCIENCE (ZHUHAI) TECHNOLOGY CO., LTD.
Inventor: Chang An Li , Ming-Hong Chang , Jun Tang , Zi Ming Du
IPC: H01L29/66 , H01L29/20 , H01L29/45 , H01L29/778
Abstract: Some embodiments of the disclosure provide a semiconductor device. The semiconductor device comprises: a substrate; a first nitride semiconductor layer on the substrate; a second nitride semiconductor layer on the first nitride semiconductor layer and having a band gap larger than a band gap of the first nitride semiconductor layer; an intermediate layer disposed on the second nitride semiconductor layer; and a conductive structure disposed on the intermediate layer, wherein a first even interface is formed between the intermediate layer and the second nitride semiconductor layer.
-
公开(公告)号:US12040394B2
公开(公告)日:2024-07-16
申请号:US17064622
申请日:2020-10-07
Applicant: INNOSCIENCE (ZHUHAI) TECHNOLOGY CO., LTD.
Inventor: Hang Liao , Qiyue Zhao , Chang An Li , Chao Wang , Chunhua Zhou , King Yuen Wong
IPC: H01L29/778 , H01L29/20
CPC classification number: H01L29/7787 , H01L29/2003
Abstract: The present invention relates to a semiconductor device having an improved gate leakage current. The semiconductor device includes: a substrate; a first nitride semiconductor layer, positioned above the substrate; a second nitride semiconductor layer, positioned above the first nitride semiconductor layer and having an energy band gap greater than that of the first nitride semiconductor layer; a source contact and a drain contact, positioned above the second nitride semiconductor layer; a doped third nitride semiconductor layer, positioned above the second nitride semiconductor layer and between the drain contact and the source contact; and a gate electrode, positioned above the doped third nitride semiconductor layer, where the doped third nitride semiconductor layer has at least one protrusion extending along a direction substantially parallel to an interface between the first nitride semiconductor layer and the second nitride semiconductor layer, thereby improving the gate leakage current phenomenon.
-
公开(公告)号:US11769826B2
公开(公告)日:2023-09-26
申请号:US17976876
申请日:2022-10-31
Applicant: INNOSCIENCE (ZHUHAI) TECHNOLOGY CO., LTD.
Inventor: Hang Liao , Qiyue Zhao , Chang An Li , Chao Wang , Chunhua Zhou , King Yuen Wong
IPC: H01L29/778 , H01L29/06 , H01L29/20 , H01L29/40
CPC classification number: H01L29/7787 , H01L29/0619 , H01L29/2003 , H01L29/404
Abstract: A semiconductor device includes a channel layer, a barrier layer, source contact and a drain contact, a doped group III-V layer, and a gate electrode. The barrier layer is positioned above the channel layer. The source contact and the drain contact are positioned above the barrier layer. The doped group III-V layer is positioned above the barrier layer and between the first drain contact and the first source contact. The first doped group III-V layer has a first non-vertical sidewall and a second non-vertical sidewall. The gate electrode is positioned above the doped group III-V layer and has a third non-vertical sidewall and a fourth non-vertical sidewall. A horizontal distance from the first non-vertical sidewall to the third non-vertical sidewall is different than a horizontal distance from the second non-vertical sidewall to the fourth non-vertical sidewall.
-
公开(公告)号:US11515409B2
公开(公告)日:2022-11-29
申请号:US17064630
申请日:2020-10-07
Applicant: INNOSCIENCE (ZHUHAI) TECHNOLOGY CO., LTD.
Inventor: Hang Liao , Qiyue Zhao , Chang An Li , Chao Wang , Chunhua Zhou , King Yuen Wong
IPC: H01L29/06 , H01L29/778 , H01L29/20 , H01L29/40
Abstract: The present invention relates to a semiconductor device with an asymmetric gate structure. The device comprises a substrate; a channel layer, positioned above the substrate; a barrier layer, positioned above the channel layer, the barrier layer and the channel layer being configured to form two-dimensional electron gas (2DEG), and the 2DEG being formed in the channel layer along an interface between the channel layer and the barrier layer; a source contact and a drain contact, positioned above the barrier layer; a doped group III-V layer, positioned above the barrier layer and between the drain contact and the source contact; and a gate electrode, positioned above the doped group III-V layer and configured to form a Schottky junction with the doped group III-V layer, wherein the doped group III-V layer and/or gate electrode has a non-central symmetrical geometry so as to achieve the effect of improving gate leakage current characteristics.
-
-
-