DSP (digital signal processing) architecture with a wide memory bandwidth and a memory mapping method thereof
    1.
    发明申请
    DSP (digital signal processing) architecture with a wide memory bandwidth and a memory mapping method thereof 失效
    具有宽内存带宽的DSP(数字信号处理)架构及其存储器映射方法

    公开(公告)号:US20050083338A1

    公开(公告)日:2005-04-21

    申请号:US10808341

    申请日:2004-03-25

    CPC classification number: G06F15/8023

    Abstract: A DSP (Digital Signal Processing) architecture with a wide memory bandwidth and a memory mapping method thereof. The DSP architecture includes: a first communication port; first, second, and third memory devices, which are connected with the first communication port and are arranged in a first row direction of the DSP architecture; a fourth memory device, a calculation element, and a fifth memory device, which are arranged in a second row direction below a first row direction of the DSP architecture; and sixth, seventh, and eighth memory devices, which are connected with the first communication port and arranged in a third row direction of the DSP architecture, wherein the calculation element is connected with the first through the eight memory devices. In the DSP architecture, the calculation element and the first through the eighth memory devices form one arrangement unit, wherein the calculation element is disposed in the center of the arrangement unit, the first through the eighth memory devices are connected to the calculation element, and a plurality of arrangement units are arranged in row directions and column directions of the DSP architecture. Therefore, since a wide data bandwidth is provided between the calculation element of the DSP architecture and the memory devices, it is possible to reduce memory access times when data is processed, and accordingly, to process data with a high data rate, such as a moving image with a high resolution.

    Abstract translation: 具有宽的存储器带宽的DSP(数字信号处理)架构及其存储器映射方法。 DSP架构包括:第一通信端口; 第一,第二和第三存储器件,其与第一通信端口连接并且被布置在DSP架构的第一行方向上; 第四存储器件,计算元件和第五存储器件,其被布置在DSP架构的第一行方向下方的第二行方向上; 以及第六,第七和第八存储器件,其与第一通信端口连接并且被布置在DSP架构的第三行方向上,其中计算元件与第一至第八存储器件连接。 在DSP架构中,计算元件和第一到第八存储器件形成一个布置单元,其中计算元件设置在布置单元的中心,第一至第八存储器件连接到计算元件,并且 在DSP架构的行方向和列方向上布置多个布置单元。 因此,由于在DSP架构的计算元件和存储器件之间提供宽的数据带宽,所以可以减少数据处理时的存储器访问时间,并因此处理具有高数据速率的数据,例如 以高分辨率移动图像。

    Digital signal processing architecture with a wide memory bandwidth and a memory mapping method thereof
    2.
    发明授权
    Digital signal processing architecture with a wide memory bandwidth and a memory mapping method thereof 失效
    具有宽的存储器带宽的数字信号处理架构及其存储器映射方法

    公开(公告)号:US07409528B2

    公开(公告)日:2008-08-05

    申请号:US10808341

    申请日:2004-03-25

    CPC classification number: G06F15/8023

    Abstract: A DSP (Digital Signal Processing) architecture with a wide memory bandwidth and a memory mapping method thereof. The DSP architecture includes: a first communication port; first, second, and third memory devices, which are connected with the first communication port and are arranged in a first row direction of the DSP architecture; a fourth memory device, a calculation element, and a fifth memory device, which are arranged in a second row direction below a first row direction of the DSP architecture; and sixth, seventh, and eighth memory devices, which are connected with the first communication port and arranged in a third row direction of the DSP architecture, wherein the calculation element is connected with the first through the eight memory devices. In the DSP architecture, the calculation element and the first through the eighth memory devices form one arrangement unit, wherein the calculation element is disposed in the center of the arrangement unit, the first through the eighth memory devices are connected to the calculation element, and a plurality of arrangement units are arranged in row directions and column directions of the DSP architecture. Therefore, since a wide data bandwidth is provided between the calculation element of the DSP architecture and the memory devices, it is possible to reduce memory access times when data is processed, and accordingly, to process data with a high data rate, such as a moving image with a high resolution.

    Abstract translation: 具有宽的存储器带宽的DSP(数字信号处理)架构及其存储器映射方法。 DSP架构包括:第一通信端口; 第一,第二和第三存储器件,其与第一通信端口连接并且被布置在DSP架构的第一行方向上; 第四存储器件,计算元件和第五存储器件,其被布置在DSP架构的第一行方向下方的第二行方向上; 以及第六,第七和第八存储器件,其与第一通信端口连接并且被布置在DSP架构的第三行方向上,其中计算元件与第一至第八存储器件连接。 在DSP架构中,计算元件和第一到第八存储器件形成一个布置单元,其中计算元件设置在布置单元的中心,第一至第八存储器件连接到计算元件,并且 在DSP架构的行方向和列方向上布置多个布置单元。 因此,由于在DSP架构的计算元件和存储器件之间提供宽的数据带宽,所以可以减少数据处理时的存储器访问时间,并因此处理具有高数据速率的数据,例如 以高分辨率移动图像。

    Apparatus and method for generating digital pulse
    3.
    发明授权
    Apparatus and method for generating digital pulse 有权
    用于产生数字脉冲的装置和方法

    公开(公告)号:US07450088B2

    公开(公告)日:2008-11-11

    申请号:US10743029

    申请日:2003-12-23

    CPC classification number: G09G5/008

    Abstract: An apparatus and method for generating digital pulse used to control or drive a device or a mechanism using a processing unit. The apparatus includes a processing unit, when a signal is input, operating a predetermined program to generate pulse data corresponding to the signal, and a digital pulse output unit synchronizing pulse data generated in the processing unit with an output clock signal and outputting the pulse data as the digital pulse.

    Abstract translation: 一种用于产生用于使用处理单元控制或驱动装置或机构的数字脉冲的装置和方法。 该装置包括处理单元,当输入信号时,操作预定程序以产生对应于该信号的脉冲数据,以及数字脉冲输出单元,将在处理单元中生成的脉冲数据与输出时钟信号同步并输出脉冲数据 作为数字脉冲。

    Four-color CRT projection method and apparatus
    4.
    发明申请
    Four-color CRT projection method and apparatus 审中-公开
    四色CRT投影方法及装置

    公开(公告)号:US20050046753A1

    公开(公告)日:2005-03-03

    申请号:US10924826

    申请日:2004-08-25

    Applicant: Han-tak Kwak

    Inventor: Han-tak Kwak

    CPC classification number: H04N9/31

    Abstract: An image projection method and an apparatus including red, green, blue, and white color cathode ray tubes (CRTs). The projection apparatus includes a digital-analog converter receiving one or more digital image signals from an image source and converting the digital signals into analog signals; one or more cathode ray tubes receiving the analog signals and outputting optical beams having strengths corresponding to the signals; a screen, a point on which the optical beams are concentrated to form a pixel; and a convergence module receiving an image synchronization signal and a convergence control signal from the image source and providing the signals to the cathode ray tubes so that the optical beams can be concentrated on the point. The digital image signals include a white color image signal, and the cathode ray tubes include a white color cathode ray tube receiving the white color image signal and outputting a white color optical beam corresponding to the signal. Therefore, high brightness and clear contrast can be obtained even when a cathode ray tube with a small aperture is used.

    Abstract translation: 一种图像投影方法和包括红色,绿色,蓝色和白色阴极射线管(CRT)的装置。 该投影设备包括数模转换器,其从图像源接收一个或多个数字图像信号,并将数字信号转换为模拟信号; 一个或多个阴极射线管接收模拟信号并输出​​具有与信号相对应的强度的光束; 屏幕,光束集中在其上以形成像素的点; 以及会聚模块,从图像源接收图像同步信号和会聚控制信号,并将信号提供给阴极射线管,使得光束可以集中在该点上。 数字图像信号包括白色图像信号,并且阴极射线管包括接收白色图像信号的白色阴极射线管,并输出与该信号对应的白色光束。 因此,即使使用小孔径的阴极射线管,也可以获得高亮度和清晰的对比度。

Patent Agency Ranking