Data Processing Method and System
    1.
    发明申请

    公开(公告)号:US20200065264A1

    公开(公告)日:2020-02-27

    申请号:US16673320

    申请日:2019-11-04

    Abstract: A data processing method and system, where the method includes: receiving, by a non-volatile memory express (NVMe) controller, a first Peripheral Component Interconnect express (PCIe) packet sent by a host, where a memory in the NVMe controller is provided with at least one input/output (I/O) submission queue, and the first PCIe packet includes entrance information of a target I/O submission queue and at least one submission queue entry (SQE); and storing the at least one SQE in the target I/O submission queue based on the entrance information of the target I/O submission queue. Therefore, an NVMe data processing process is simplified and less time-consuming, and data processing efficiency is improved.

    Non-volatile memory (NVM) express (NVMe) data processing method and system

    公开(公告)号:US11169938B2

    公开(公告)日:2021-11-09

    申请号:US16673320

    申请日:2019-11-04

    Abstract: A data processing method and system, where the method includes: receiving, by a non-volatile memory express (NVMe) controller, a first Peripheral Component Interconnect express (PCIe) packet sent by a host, where a memory in the NVMe controller is provided with at least one input/output (I/O) submission queue, and the first PCIe packet includes entrance information of a target I/O submission queue and at least one submission queue entry (SQE); and storing the at least one SQE in the target I/O submission queue based on the entrance information of the target I/O submission queue. Therefore, an NVMe data processing process is simplified and less time-consuming, and data processing efficiency is improved.

    Packet Data Processing Method, Apparatus, and System
    3.
    发明申请
    Packet Data Processing Method, Apparatus, and System 审中-公开
    分组数据处理方法,装置和系统

    公开(公告)号:US20170052925A1

    公开(公告)日:2017-02-23

    申请号:US15344972

    申请日:2016-11-07

    Inventor: Junying Li Rui Tan

    CPC classification number: G06F13/4282 G06F13/36 G06F13/385

    Abstract: A packet data processing method, apparatus, and system. The method is executed by a first processing apparatus, and includes: acquiring packet data that needs to be processed, where the packet data that needs to be processed includes first packet data information and second packet data, and the first packet data information includes a header of the packet data that needs to be processed and a storage address of the packet data that needs to be processed in the first processing apparatus; sending the first packet data information to a second processing apparatus; and receiving first packet data information (includes an updated header after being processed and the storage address) processed by the second processing apparatus, and generating finished packet data using the first packet data information processed by the second processing apparatus and the second packet data.

    Abstract translation: 分组数据处理方法,装置和系统。 该方法由第一处理装置执行,包括:获取需要处理的分组数据,其中需要处理的分组数据包括第一分组数据信息和第二分组数据,并且第一分组数据信息包括报头 需要处理的分组数据和在第一处理装置中需要处理的分组数据的存储地址; 将第一分组数据信息发送到第二处理装置; 以及接收由第二处理装置处理的第一分组数据信息(包括被处理的更新的报头和存储地址),并且使用由第二处理装置处理的第一分组数据信息和第二分组数据来生成完成的分组数据。

    NVMe-based data writing method, apparatus, and system

    公开(公告)号:US11579803B2

    公开(公告)日:2023-02-14

    申请号:US17130363

    申请日:2020-12-22

    Abstract: In an NVMe-based storage system, a host is connected to an NVMe controller through a PCIe bus, and the NVMe controller is connected to a storage medium. The NVMe controller receives from the host a data packet that carries payload data and an association identifier. The association identifier associates the payload data with a write instruction. The NVMe controller obtains the write instruction according to the association identifier, and then writes the payload data into the storage medium according to the write instruction.

    TRANSACTION PROCESSING METHOD AND DEVICE
    5.
    发明公开

    公开(公告)号:US20240314204A1

    公开(公告)日:2024-09-19

    申请号:US18676795

    申请日:2024-05-29

    CPC classification number: H04L67/1097

    Abstract: This application discloses a transaction processing method and a device that may be used in the field of network technologies. The method includes: A transmitting device determines a first order flag for a generated first transaction based on service logic of an application, and obtains order auxiliary information of the first transaction. The order flag indicates a dependency relationship (for example, forward dependency and backward blocking) between different transactions. This application does not depend on an operation type of a transaction. A transaction order between transactions may be set, and the receiving device ensures an execution order of each transaction based on an order flag, provided that a transaction relationship is fully expressed. The transaction order is flexibly defined, to meet the requirements of different scenarios and improve processing performance.

    Data processing method for network adapter and network adapter

    公开(公告)号:US12014173B2

    公开(公告)日:2024-06-18

    申请号:US18062874

    申请日:2022-12-07

    CPC classification number: G06F9/06 G06F3/0604

    Abstract: A data processing method for a network adapter includes the network adapter that obtains a first input/output (I/O) command. The first I/O command instructs to write data stored in a local server to at least one remote server, and the first I/O command includes address information and length information that are of the data and that are stored in the local server. The network adapter splits the data based on the address information and the length information to obtain a plurality of groups of address information and length information. The network adapter obtains, from the local server based on the groups of address information and length information, data corresponding to the groups of address information and length information, and sends the data to the at least one remote server.

    Non-volatile memory express (NVMe) data processing method and system

    公开(公告)号:US11636052B2

    公开(公告)日:2023-04-25

    申请号:US17498348

    申请日:2021-10-11

    Abstract: A data processing method and system, where the method includes: receiving, by a non-volatile memory express (NVMe) controller, a first Peripheral Component Interconnect express (PCIe) packet sent by a host, where a memory in the NVMe controller is provided with at least one input/output (I/O) submission queue, and the first PCIe packet includes entrance information of a target I/O submission queue and at least one submission queue entry (SQE); and storing the at least one SQE in the target I/O submission queue based on the entrance information of the target I/O submission queue. Therefore, an NVMe data processing process is simplified and less time-consuming, and data processing efficiency is improved.

    NVME-BASED DATA WRITING METHOD, APPARATUS, AND SYSTEM

    公开(公告)号:US20210109681A1

    公开(公告)日:2021-04-15

    申请号:US17130363

    申请日:2020-12-22

    Abstract: In an NVMe-based storage system, a host is connected to an NVMe controller through a PCIe bus, and the NVMe controller is connected to a storage medium. The NVMe controller receives from the host a data packet that carries payload data and an association identifier. The association identifier associates the payload data with a write instruction. The NVMe controller obtains the write instruction according to the association identifier, and then writes the payload data into the storage medium according to the write instruction.

    NVME-BASED DATA READ METHOD, APPARATUS, AND SYSTEM

    公开(公告)号:US20210034284A1

    公开(公告)日:2021-02-04

    申请号:US17072038

    申请日:2020-10-16

    Abstract: A non-volatile memory express (NVMe)-based data read method, apparatus, and system are provided. In various embodiments, a read instruction can be triggered by a host. The read instruction carries indication information of a first address opened by the host to an NVMe controller for addressing and accessing. In those embodiments, the host after obtaining the read instruction can send a data packet to the host. The data packet carries the first address and payload data. Still in those embodiments, the host can, after receiving the data packet, determine a second address based on the first address, and store the payload data into storage space indicated by the second address. The second address may be a private memory address of the host. Because a relationship between the second address and a communication protocol is broken, and the host may access the second address without being restricted by the communication protocol.

    Stateful service processing method and apparatus

    公开(公告)号:US12199883B2

    公开(公告)日:2025-01-14

    申请号:US17965112

    申请日:2022-10-13

    Inventor: Junying Li

    Abstract: A stateful service processing method and apparatus are provided, related to the field of communication technologies. The method includes: preprocessing a received first packet to obtain a coalescing message of the first packet; coalescing the first packet into a first queue based on the coalescing message of the first packet, where the first queue is used to coalesce packets of a first connection to which the first packet belongs, and the first connection is a connection in which a stateful service is located; when a preset condition is met, processing, based on a context of the first connection, a plurality of packets coalesced in the first queue to obtain a second packet, where the context of the first connection is an updated context obtained after a previous second packet of the first connection is obtained; and transmitting the second packet to the host.

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