公开(公告)号：US20250021496A1

公开(公告)日：2025-01-16

申请号：US18900835

申请日：2024-09-29

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Junlong Liu ,  Chuanning Cheng ,  Ziyong Zheng

IPC: G06F12/14

Abstract: This application provides a memory access method and a related device. The method includes: a second apparatus sends a first access request to a first apparatus, where the first access request includes an identity number, a first security check value, and first information, and the first information includes a first physical address. The first apparatus receives the first access request from the second apparatus, obtains a second security check value through computation based on the identity number and the first information, and determines an access permission of the second apparatus for the first physical address based on the first security check value and the second security check value.

公开(公告)号：US20240403224A1

公开(公告)日：2024-12-05

申请号：US18807043

申请日：2024-08-16

Applicant: Huawei Technologies Co., Ltd.

Inventor： Wei Pan ,  Junping Luo ,  Tao Li ,  Kenneth Chong Yin Tan ,  Junlong Liu

IPC: G06F12/1009

Abstract: A memory access method comprises adding routing information to a memory page table, so that a memory management unit (MMU) queries, in a process of performing address translation on a virtual address (VA), the memory page table to obtain the routing information. After querying the memory page table and obtaining a physical address (PA), the MMU may directly route the PA based on the routing information, whereby a system address decoder (SAD) is not needed for further decoding the PA.

公开(公告)号：US20240330202A1

公开(公告)日：2024-10-03

申请号：US18673967

申请日：2024-05-24

Applicant: Huawei Technologies Co., Ltd.

Inventor： Wei Pan ,  Junping Luo ,  Tao Li ,  Kenneth Chong Yin Tan ,  Junlong Liu

IPC: G06F12/1027 ,  G06F12/1009

CPC classification number: G06F12/1027 ,  G06F12/1009 ,  G06F2212/657

Abstract: A plurality of physical cores of a processor share a memory management unit (MMU) pool comprising a plurality of MMUs. The plurality of MMUs provides each physical core with an address translation function from a virtual address (VA) to a physical address (PA). If an address translation requirement of a physical core is high, for example, when a main memory is concurrently accessed, the plurality of MMUs can serve the physical core.

公开(公告)号：US20230176984A1

公开(公告)日：2023-06-08

申请号：US18162114

申请日：2023-01-31

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Junlong Liu

IPC: G06F12/14 ,  G06F12/1045

CPC classification number: G06F12/1458 ,  G06F12/1054 ,  G06F12/1441

Abstract: This application discloses a memory protection method and a protection proxy control apparatus. In an example method, in response to determining that an accelerator or an input/output (I/O) device requests to access a system memory by using a direct physical address, the protection proxy control apparatus may obtain, based on an identifier of a data stream of the accelerator or the I/O device, permission information of a physical page table in which a physical address requested to be accessed by the data stream is located, and perform permission check on the memory access request based on the permission information.