公开(公告)号：US20240273049A1

公开(公告)日：2024-08-15

申请号：US18641106

申请日：2024-04-19

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Wei Pan ,  Tao Li ,  Junping Luo

IPC: G06F13/40

CPC classification number: G06F13/4068

Abstract: Embodiments of this application disclose a computing system, an addressing method, a compute node, and a program product, and pertain to the computing field. Each compute node in a computing system has a different first-level identifier, and a plurality of function modules in each compute node have different second-level identifiers. The second-level identifier is used for routing and addressing between function modules in a same compute node, and the first-level identifier and the second-level identifier are used for routing and addressing between function modules in different compute nodes. In other words, unified addressing is performed on the different compute nodes, and is also performed on the function modules in the same compute node. In this way, interconnection specifications used during communication between the compute nodes and communication in the compute node are consistent, complex protocol conversion is not needed, data processing efficiency is improved, and latency is reduced.

公开(公告)号：US20240403224A1

公开(公告)日：2024-12-05

申请号：US18807043

申请日：2024-08-16

Applicant: Huawei Technologies Co., Ltd.

Inventor： Wei Pan ,  Junping Luo ,  Tao Li ,  Kenneth Chong Yin Tan ,  Junlong Liu

IPC: G06F12/1009

Abstract: A memory access method comprises adding routing information to a memory page table, so that a memory management unit (MMU) queries, in a process of performing address translation on a virtual address (VA), the memory page table to obtain the routing information. After querying the memory page table and obtaining a physical address (PA), the MMU may directly route the PA based on the routing information, whereby a system address decoder (SAD) is not needed for further decoding the PA.

公开(公告)号：US20240214245A1

公开(公告)日：2024-06-27

申请号：US18599570

申请日：2024-03-08

Applicant: Huawei Technologies Co., Ltd.

Inventor： Junping Luo ,  Wei Pan ,  Er Nie ,  Jiankang Li

IPC: H04L25/03

CPC classification number: H04L25/03 ,  H04L25/03006 ,  H04L2025/03777

Abstract: A transmitter equalization parameter evaluation method and an apparatus are provided. The method provided in this application is used for evaluating a transmitter equalization parameter of a high-speed interface in a first device, and the method is performed by a second device connected to the first device over a communication link. The second device first detects a status of the communication link between the first device and the second device, where the communication link is constructed through the high-speed interface in the first device. When determining that the communication link is idle, the second device performs a transmitter equalization parameter evaluation process of the high-speed interface in the first device based on the communication link. When the communication link is idle, the transmitter equalization parameter evaluation process of the high-speed interface in the first device is started. This ensures efficiency of transmitter equalization parameter evaluation.

公开(公告)号：US20240330202A1

公开(公告)日：2024-10-03

申请号：US18673967

申请日：2024-05-24

Applicant: Huawei Technologies Co., Ltd.

Inventor： Wei Pan ,  Junping Luo ,  Tao Li ,  Kenneth Chong Yin Tan ,  Junlong Liu

IPC: G06F12/1027 ,  G06F12/1009

CPC classification number: G06F12/1027 ,  G06F12/1009 ,  G06F2212/657

Abstract: A plurality of physical cores of a processor share a memory management unit (MMU) pool comprising a plurality of MMUs. The plurality of MMUs provides each physical core with an address translation function from a virtual address (VA) to a physical address (PA). If an address translation requirement of a physical core is high, for example, when a main memory is concurrently accessed, the plurality of MMUs can serve the physical core.

公开(公告)号：US20240320087A1

公开(公告)日：2024-09-26

申请号：US18735483

申请日：2024-06-06

Applicant: Huawei Technologies Co., Ltd.

Inventor： Wei Pan ,  Junping Luo

IPC: G06F11/10

CPC classification number: G06F11/1004

Abstract: When a memory controller may need to read target data in a memory, the memory controller reads the target data and first check code of the target data from the memory. The memory controller may check the target data using the first check code. If the check fails, it indicates that error data exists in the target data. The memory controller may perform error correction on the target data using the first check code. After failing to perform error correction on the target data using the first check code in the memory, the memory controller performs error correction on the target data using the second check code in the secondary storage, to ensure that the error correction is implemented on the target data.

公开(公告)号：US20240160597A1

公开(公告)日：2024-05-16

申请号：US18405234

申请日：2024-01-05

Applicant: Huawei Technologies Co., Ltd.

Inventor： Wei Pan ,  Pingyu Wu ,  Junping Luo

IPC: G06F13/42

CPC classification number: G06F13/4282

Abstract: A link negotiation system includes a second device that determines a link configuration policy based on a status of a receiver of an interface of the second device, where the link configuration policy indicates an association relationship between a unidirectional logical lane and a unidirectional physical lane in a high-speed serial link between a first device and the second device, the unidirectional logical lane is a logical lane from the first device to the second device in the high-speed serial link, and the unidirectional physical lane is a physical lane from the first device to the second device in the high-speed serial link; and sends the link configuration policy to the first device.