公开(公告)号：US20180107628A1

公开(公告)日：2018-04-19

申请号：US15845450

申请日：2017-12-18

Applicant: Huawei Technologies Co., Ltd.

Inventor： Jiangen Liu ,  Chenghong He ,  Haibin Wang ,  Xinyu Hou

IPC: G06F15/80 ,  G06F15/173 ,  G06F15/167 ,  G06F13/42

CPC classification number: G06F15/80 ,  G06F13/4221 ,  G06F15/167 ,  G06F15/17337

Abstract: A computer subsystem and a computer system, where the computer subsystem includes L composite nodes (CNs), each CN includes M basic nodes, each basic node includes N central processing units (CPUs) and one node controller (NC). Any two CPUs in each basic node are interconnected. Each CPU in each basic node is connected to the NC in the basic node. The NC in each basic node has a routing function. Any two NCs in the M basic nodes are interconnected. A connection between the L CNs formed through connections between NCs enables communication between any two NCs to be no more than three hops. Hence, the computer subsystem and the computer system can reduce the kinds and the number of interconnection chips, and simplify an interconnection structure of a system, thereby improving reliability of the system.

公开(公告)号：US09300527B2

公开(公告)日：2016-03-29

申请号：US14084393

申请日：2013-11-19

Applicant: Huawei Technologies Co., Ltd.

Inventor： Haibin Wang ,  Jiangen Liu

IPC: G01R31/08 ,  H04L12/24 ,  H04L12/64 ,  H04L29/08 ,  H04L12/437 ,  H04L12/715 ,  H04L12/703

CPC classification number: H04L41/0654 ,  H04L12/437 ,  H04L12/6418 ,  H04L45/04 ,  H04L45/28 ,  H04L69/324

Abstract: The present invention provides a node routing method of a multi-processor system, a controller and a multi-processor system. The method includes learning a state of an available link between nodes in the multi-processor system, where the multi-processor system includes a first subnet and the first subnet includes at least two connected nodes, and when at least one link in the first subnet fails, reselecting an available link between all nodes in the first subnet, so that the nodes in the first subnet use the reselected available link to route a packet, where the reselected available link is a link on each node in the first subnet except a link whose dimension sequence number is the same as that of the failed link, a dimension sequence number is numbers of a link at two end nodes, and numbers of a link at two end nodes are the same.

Abstract translation: 本发明提供了多处理器系统，控制器和多处理器系统的节点路由方法。 该方法包括学习多处理器系统中的节点之间的可用链路的状态，其中多处理器系统包括第一子网，并且第一子网包括至少两个连接的节点，以及当第一子网中的至少一个链路 失败，重新选择第一子网中的所有节点之间的可用链接，使得第一子网中的节点使用重新选择的可用链路来路由分组，其中重新选择的可用链路是第一子网中的每个节点上的链路，除了链路 其维度序列号与故障链路的序列号相同，维度序列号是两端节点的链路数，两端节点的链路数量相同。

公开(公告)号：US20140078891A1

公开(公告)日：2014-03-20

申请号：US14084393

申请日：2013-11-19

Applicant: Huawei Technologies Co., Ltd.

Inventor： Haibin Wang ,  Jiangen Liu

IPC: H04L12/24 ,  H04L29/08

CPC classification number: H04L41/0654 ,  H04L12/437 ,  H04L12/6418 ,  H04L45/04 ,  H04L45/28 ,  H04L69/324

Abstract: The present invention provides a node routing method of a multi-processor system, a controller and a multi-processor system. The method includes learning a state of an available link between nodes in the multi-processor system, where the multi-processor system includes a first subnet and the first subnet includes at least two connected nodes, and when at least one link in the first subnet fails, reselecting an available link between all nodes in the first subnet, so that the nodes in the first subnet use the reselected available link to route a packet, where the reselected available link is a link on each node in the first subnet except a link whose dimension sequence number is the same as that of the failed link, a dimension sequence number is numbers of a link at two end nodes, and numbers of a link at two end nodes are the same.

Abstract translation: 本发明提供了多处理器系统，控制器和多处理器系统的节点路由方法。 该方法包括学习多处理器系统中的节点之间的可用链路的状态，其中多处理器系统包括第一子网，并且第一子网包括至少两个连接的节点，以及当第一子网中的至少一个链路 失败，重新选择第一子网中的所有节点之间的可用链接，使得第一子网中的节点使用重新选择的可用链路来路由数据包，其中重新选择的可用链路是第一子网中除了链路之外的每个节点上的链路 其维度序列号与故障链路的序列号相同，维度序列号是两端节点的链路数，两端节点的链路数量相同。

公开(公告)号：US10951741B2

公开(公告)日：2021-03-16

申请号：US15874852

申请日：2018-01-18

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Yun Chen ,  Haibin Wang ,  Xiongli Gu ,  Xiaosong Cui

IPC: H04L29/06 ,  G06F1/16 ,  G06F3/06 ,  G06F13/32

Abstract: A computer device and a method for reading or writing data by a computer device are provided. In the computer device, a central processing unit (CPU) is connected to a cloud controller using a double data rate (DDR) interface. Because the DDR interface has a high data transmission rate, interruption of CPU can be avoided. In addition, the CPU converts a read or write operation request into a control command and writes the control command into a transmission queue in the cloud controller. Because the cloud controller performs a read operation or a write operation on a network device according to operation information in the control command, after writing the control command into the transmission queue, the CPU does not need to wait for an operation performed by the cloud controller and can continue to perform other processes.

公开(公告)号：US10749754B2

公开(公告)日：2020-08-18

申请号：US16371909

申请日：2019-04-01

Applicant: Huawei Technologies Co., Ltd.

Inventor： Jie Cheng ,  Haibin Wang ,  Yanhua Li

IPC: H04L12/24 ,  H04W64/00 ,  H04W4/02

Abstract: A network distance prediction method and apparatus, wherein the method includes communicating, with at least two reference nodes, to determine values of at least some elements in a local distance matrix; constructing, the local distance matrix based on the values of the at least some elements in the local distance matrix; performing, low-rank sparse factorization on the local distance matrix to obtain a low-rank matrix; obtaining, values of elements in a first element set of the low-rank matrix, to use the values as target values of network distances between the to-be-positioned node and the at least two reference nodes; communicating, with the reference nodes, to obtain coordinates of the reference nodes in a network coordinate system; and determining, coordinates of the to-be-positioned node.

公开(公告)号：US20160328357A1

公开(公告)日：2016-11-10

申请号：US15150419

申请日：2016-05-09

Applicant: HUAWEI TECHNOLOGIES CO.,LTD.

Inventor： Jiangen Liu ,  Chenghong He ,  Haibin Wang ,  Xinyu Hou

IPC: G06F15/80 ,  G06F13/42

CPC classification number: G06F15/80 ,  G06F13/4221 ,  G06F15/167 ,  G06F15/17337

Abstract: The present invention provides a computer subsystem and a computer system. The computer subsystem includes L composite nodes, each composite node includes M basic nodes, each basic node includes N central processing units (CPUs) and one node controller. Any two CPUs in each basic node are interconnected. Each CPU in each basic node is connected to the node controller in the basic node. The node controller in each basic node has a routing function. Any two node controllers in the M basic nodes are interconnected. A connection between the L composite nodes formed through connections between node controllers enables communication between any two node controllers to be no more than three hops. The computer subsystem and the computer system according to embodiments of the present invention can reduce the kinds and the number of interconnection chips, and simplify an interconnection structure of a system, thereby improving reliability of the system.

Abstract translation: 本发明提供一种计算机子系统和计算机系统。 计算机子系统包括L个复合节点，每个复合节点包括M个基本节点，每个基本节点包括N个中央处理单元（CPU）和一个节点控制器。 每个基本节点中的任何两个CPU都是互连的。 每个基本节点中的每个CPU都连接到基本节点中的节点控制器。 每个基本节点中的节点控制器具有路由功能。 M个基本节点中的任何两个节点控制器互连。 通过节点控制器之间的连接形成的L个复合节点之间的连接使得任何两个节点控制器之间的通信不超过三跳。 根据本发明的实施例的计算机子系统和计算机系统可以减少互连芯片的种类和数量，并且简化系统的互连结构，从而提高系统的可靠性。

公开(公告)号：US20180159963A1

公开(公告)日：2018-06-07

申请号：US15874852

申请日：2018-01-18

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Yun Chen ,  Haibin Wang ,  Xiongli Gu ,  Xiaosong Cui

IPC: H04L29/06 ,  G06F13/32

CPC classification number: H04L69/10 ,  G06F1/16 ,  G06F3/061 ,  G06F3/0611 ,  G06F3/0659 ,  G06F3/067 ,  G06F13/32 ,  H04L69/02

Abstract: A computer device and a method for reading or writing data by a computer device are provided. In the computer device, a central processing unit (CPU) is connected to a cloud controller using a double data rate (DDR) interface. Because the DDR interface has a high data transmission rate, interruption of CPU can be avoided. In addition, the CPU converts a read or write operation request into a control command and writes the control command into a transmission queue in the cloud controller. Because the cloud controller performs a read operation or a write operation on a network device according to operation information in the control command, after writing the control command into the transmission queue, the CPU does not need to wait for an operation performed by the cloud controller and can continue to perform other processes.

公开(公告)号：US09880972B2

公开(公告)日：2018-01-30

申请号：US15150419

申请日：2016-05-09

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Jiangen Liu ,  Chenghong He ,  Haibin Wang ,  Xinyu Hou

IPC: G06F9/30 ,  G06F15/80 ,  G06F15/173 ,  G06F15/167 ,  G06F13/42

CPC classification number: G06F15/80 ,  G06F13/4221 ,  G06F15/167 ,  G06F15/17337

Abstract: The present invention provides a computer subsystem and a computer system. The computer subsystem includes L composite nodes, each composite node includes M basic nodes, each basic node includes N central processing units (CPUs) and one node controller. Any two CPUs in each basic node are interconnected. Each CPU in each basic node is connected to the node controller in the basic node. The node controller in each basic node has a routing function. Any two node controllers in the M basic nodes are interconnected. A connection between the L composite nodes formed through connections between node controllers enables communication between any two node controllers to be no more than three hops. The computer subsystem and the computer system according to embodiments of the present invention can reduce the kinds and the number of interconnection chips, and simplify an interconnection structure of a system, thereby improving reliability of the system.

公开(公告)号：US20160234311A1

公开(公告)日：2016-08-11

申请号：US15131449

申请日：2016-04-18

Applicant: Huawei Technologies Co., Ltd.

Inventor： Xiongli Gu ,  Haibin Wang ,  Xiaosong Cui

IPC: H04L29/08 ,  G06F3/06

Abstract: A memory access device allocate a memory resource to a node in a system to reduce maintenance overheads of the system and implement flexible scheduling of memory resources. The device includes a cloud control device on the side of a requesting node and a cloud control device on the side of a contributing node. The cloud control device on the side of the requesting node generates a request packet for accessing to-be-accessed data stored in the contributing node which provides memory resource, sends the request packet to the contributing node t. The cloud control device on the side of the contributing node receives the request packet, provides a request message to the contributing node, generates the response packet for the contributing node, and sends the response packet to the requesting node.

Abstract translation: 存储器访问设备向系统中的节点分配存储器资源以减少系统的维护开销并实现对存储器资源的灵活调度。 该设备包括在请求节点侧的云控制设备和在贡献节点一侧的云控制设备。 请求节点侧的云控制装置生成用于访问存储在提供存储器资源的贡献节点中的被访问数据的请求分组，将请求分组发送到贡献节点t。 贡献节点侧的云控制装置接收请求分组，向贡献节点提供请求消息，生成贡献节点的响应分组，并将响应分组发送给请求节点。

公开(公告)号：US09336179B2

公开(公告)日：2016-05-10

申请号：US13670718

申请日：2012-11-07

Applicant: Huawei Technologies Co., Ltd.

Inventor： Jiangen Liu ,  Chenghong He ,  Haibin Wang ,  Xinyu Hou

IPC: G06F9/30 ,  G06F15/173 ,  G06F15/167

CPC classification number: G06F15/80 ,  G06F13/4221 ,  G06F15/167 ,  G06F15/17337

Abstract: The present invention provides a computer subsystem and a computer system. The computer subsystem includes L composite nodes, each composite node includes M basic nodes, each basic node includes N central processing units CPUs and one node controller NC, where any two CPUs in each basic node are interconnected, each CPU in each basic node is connected to the NC in the basic node, the NC in each basic node has a routing function, any two NCs in the M basic nodes are interconnected, and a connection between the L composite nodes formed through a connection between NCs enable communication between any two NCs to require at most three hops. The computer subsystem and the computer system according to embodiments of the present invention can reduce the kinds and the number of interconnection chips, and simplify an interconnection structure of a system, thereby improving reliability of the system.

Abstract translation: 本发明提供一种计算机子系统和计算机系统。 计算机子系统包括L个复合节点，每个复合节点包括M个基本节点，每个基本节点包括N个中央处理单元CPU和一个节点控制器NC，其中每个基本节点中的任何两个CPU互连，每个基本节点中的每个CPU都连接 在基本节点中的NC中，每个基本节点中的NC具有路由功能，M个基本节点中的任何两个NC互连，并且通过NC之间的连接形成的L个复合节点之间的连接使得任何两个NC之间的通信 要求最多三跳。 根据本发明的实施例的计算机子系统和计算机系统可以减少互连芯片的种类和数量，并且简化系统的互连结构，从而提高系统的可靠性。