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公开(公告)号：US20230350595A1
公开(公告)日：2023-11-02
申请号：US18313467
申请日：2023-05-08
Applicant: Huawei Technologies Co., Ltd.
Inventor： Ge Du , Yu Hu , Jiancen Hou
IPC: G06F3/06 , G06F12/0868 , G06F12/02
CPC classification number: G06F3/0647 , G06F3/0604 , G06F3/0688 , G06F12/0868 , G06F12/0246 , G06F3/0646 , G06F3/061
Abstract: A host of a storage system is coupled to multiple SSDs. Each SSD is configured with a migration cache, and each SSD corresponds to one piece of access information. The host obtains migration data information of to-be-migrated data in a source SSD, determines a target SSD, and sends a read instruction carrying information about to-be-migrated data and the target SSD to the source SSD. The source SSD reads a data block according to the read instruction from a flash memory of the source SSD into a migration cache of the target SSD. After a read instruction is completed by the SSD, the host sends a write instruction to the target SSD to instruct the target SSD to write the data block in the cache of the target SSD to a flash memory of the target SSD.
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公开(公告)号：US20240264760A1
公开(公告)日：2024-08-08
申请号：US18635269
申请日：2024-04-15
Applicant: Huawei Technologies Co., Ltd.
Inventor： Ge Du , Yu Hu , Jiancen Hou
IPC: G06F3/06 , G06F12/02 , G06F12/0868
CPC classification number: G06F3/0647 , G06F3/0604 , G06F3/061 , G06F3/0646 , G06F3/0688 , G06F12/0246 , G06F12/0868
Abstract: A host of a storage system is coupled to multiple SSDs. Each SSD is configured with a migration cache, and each SSD corresponds to one piece of access information. The host obtains migration data information of to-be-migrated data in a source SSD, determines a target SSD, and sends a read instruction carrying information about to-be-migrated data and the target SSD to the source SSD. The source SSD reads a data block according to the read instruction from a flash memory of the source SSD into a migration cache of the target SSD. After a read instruction is completed by the SSD, the host sends a write instruction to the target SSD to instruct the target SSD to write the data block in the cache of the target SSD to a flash memory of the target SSD.
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公开(公告)号：US09785530B2
公开(公告)日：2017-10-10
申请号：US14806078
申请日：2015-07-22
Applicant: Huawei Technologies Co., Ltd.
Inventor： Ge Du
CPC classification number: G06F11/3027 , G06F11/0745 , G06F11/221 , G06F13/4022 , G06F13/4221
Abstract: In a Peripheral Component Interconnect Express (PCIe) system, a first PCIe apparatus determines that at least one of lanes of a link between the first PCIe apparatus and a second PCIe apparatus is disabled, wherein the link includes M lanes numbered in a first order. Based upon the determination, the first PCIe apparatus obtains a number N indicating a number of available lanes of the link by performing a lane negotiation with the second PCIe apparatus. Then, a processor determines that N
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公开(公告)号：US11644994B2
公开(公告)日：2023-05-09
申请号：US16985575
申请日：2020-08-05
Applicant: Huawei Technologies Co., Ltd.
Inventor： Ge Du , Yu Hu , Jiancen Hou
IPC: G06F12/00 , G06F3/06 , G06F12/0868 , G06F12/02
CPC classification number: G06F3/0647 , G06F3/061 , G06F3/0604 , G06F3/0646 , G06F3/0688 , G06F12/0246 , G06F12/0868
Abstract: A host of a storage system is coupled to multiple SSDs. Each SSD is configured with a migration cache, and each SSD corresponds to one piece of access information. The host obtains migration data information of to-be-migrated data in a source SSD, determines a target SSD, and sends a read instruction carrying information about to-be-migrated data and the target SSD to the source SSD. The source SSD reads a data block according to the read instruction from a flash memory of the source SSD into a migration cache of the target SSD. After a read instruction is completed by the SSD, the host sends a write instruction to the target SSD to instruct the target SSD to write the data block in the cache of the target SSD to a flash memory of the target SSD.
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公开(公告)号：US10795599B2
公开(公告)日：2020-10-06
申请号：US16423341
申请日：2019-05-28
Applicant: Huawei Technologies Co., Ltd.
Inventor： Ge Du , Yu Hu , Jiancen Hou
IPC: G06F12/00 , G06F3/06 , G06F12/0868 , G06F12/02
Abstract: A host of a storage system is coupled to multiple SSDs. Each SSD is configured with a migration cache, and each SSD corresponds to one piece of access information. The host obtains migration data information of to-be-migrated data in a source SSD, determines a target SSD, and sends a read instruction carrying information about to-be-migrated data and the target SSD to the source SSD. The source SSD reads a data block according to the read instruction from a flash memory of the source SSD into a migration cache of the target SSD. After a read instruction is completed by the SSD, the host sends a write instruction to the target SSD to instruct the target SSD to write the data block in the cache of the target SSD to a flash memory of the target SSD.
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Patent Agency Ranking
6.发明申请Computer System, Method for Accessing Peripheral Component Interconnect Express Endpoint Device, and Apparatus 有权计算机系统，用于访问外围组件互连Express端点设备的方法和设备公开(公告)号：US20140331000A1
公开(公告)日：2014-11-06
申请号：US14297959
申请日：2014-06-06
Applicant: Huawei Technologies Co., Ltd.
Inventor： Ge Du
IPC: G06F13/28
CPC classification number: G06F13/4221 , G06F9/44 , G06F9/4411 , G06F13/28 , G06F13/385 , G06F13/4027 , G06F2213/0026 , G06F2213/2802
Abstract: A computer system and a method are provided for accessing a peripheral component interconnect express (PCIe) endpoint device. The computer system includes: a processor, a PCIe bus, and an access proxy. The access proxy connects to the processor and the PCIe endpoint device; the processor acquires an operation instruction, where the operation instruction instructs the processor to access the PCIe endpoint device through the access proxy, and send an access request to the access proxy according to the operation instruction; and the access proxy sends a response message of the access request to the processor after receiving the access request sent by the processor. Because the processor does not directly access the PCIe endpoint device to be accessed but completes access through the access proxy, thereby avoiding an MCE reset for the processor.
Abstract translation: 提供了一种用于访问外围组件互连快递（PCIe）端点设备的计算机系统和方法。 计算机系统包括：处理器，PCIe总线和访问代理。 访问代理连接到处理器和PCIe端点设备; 处理器获取操作指令，其中操作指令指示处理器通过访问代理访问PCIe端点设备，并根据操作指令向访问代理发送访问请求; 并且接入代理在接收到由处理器发送的访问请求之后，向处理器发送访问请求的响应消息。 因为处理器不直接访问要访问的PCIe端点设备，而是通过访问代理完成访问，从而避免了处理器的MCE重置。
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公开(公告)号：US20240264773A1
公开(公告)日：2024-08-08
申请号：US18613698
申请日：2024-03-22
Applicant: Huawei Technologies Co., Ltd.
Inventor： Ruliang Dong , Ge Du , Huawei Liu , Jinyi Zhang
IPC: G06F3/06
CPC classification number: G06F3/0659 , G06F3/0611 , G06F3/067
Abstract: A data prefetching method includes a computing node obtaining information about accessing a storage node by a first application in a preset time period. The computing node determines information about prefetch data based on the access information. The computing node determines, based on the information about the prefetch data, a cache node prefetching the prefetch data, and generates a prefetch request for prefetching the prefetch data. The computing node sends the prefetch request to the cache node. The cache node performs a prefetching operation on the prefetch data in response to the prefetch request.
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公开(公告)号：US11966612B2
公开(公告)日：2024-04-23
申请号：US16809026
申请日：2020-03-04
Applicant: Huawei Technologies Co., Ltd.
IPC: G06F3/06 , H04L61/5007
CPC classification number: G06F3/0647 , G06F3/0619 , G06F3/0659 , G06F3/067 , G06F3/0688 , H04L61/5007
Abstract: A method for migrating data by a source network interface card includes: receiving a first migration instruction; sending a read instruction to the source SSD when receiving the first migration instruction, where the read instruction is used to instruct the source SSD to read the to-be-migrated data into the source migration cache; and sending a second migration instruction to a target intelligent network interface card of the target storage array after the to-be-migrated data is read from the source SSD, where the second migration instruction is used to instruct the target intelligent network interface card to migrate the to-be-migrated data in the source migration cache to the target storage array.
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公开(公告)号：US10025745B2
公开(公告)日：2018-07-17
申请号：US14297959
申请日：2014-06-06
Applicant: Huawei Technologies Co., Ltd.
Inventor： Ge Du
Abstract: A computer system and a method are provided for accessing a peripheral component interconnect express (PCIe) endpoint device. The computer system includes: a processor, a PCIe bus, and an access proxy. The access proxy connects to the processor and the PCIe endpoint device; the processor acquires an operation instruction, where the operation instruction instructs the processor to access the PCIe endpoint device through the access proxy, and send an access request to the access proxy according to the operation instruction; and the access proxy sends a response message of the access request to the processor after receiving the access request sent by the processor. Because the processor does not directly access the PCIe endpoint device to be accessed but completes access through the access proxy, thereby avoiding an MCE reset for the processor.
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公开(公告)号：US20150324268A1
公开(公告)日：2015-11-12
申请号：US14806078
申请日：2015-07-22
Applicant: Huawei Technologies Co., Ltd.
Inventor： Ge Du
CPC classification number: G06F11/3027 , G06F11/0745 , G06F11/221 , G06F13/4022 , G06F13/4221
Abstract: In a Peripheral Component Interconnect Express (PCIe) system, a first PCIe apparatus determines that at least one of lanes of a link between the first PCIe apparatus and a second PCIe apparatus is disabled, wherein the link includes M lanes numbered in a first order. Based upon the determination, the first PCIe apparatus obtains a number N indicating a number of available lanes of the link by performing a lane negotiation with the second PCIe apparatus. Then, a processor determines that N
Abstract translation: 在外围组件互连Express（PCIe）系统中，第一PCIe设备确定第一PCIe设备和第二PCIe设备之间的链路中的至少一条通道被禁用，其中链路包括以第一顺序编号的M通道。 基于该确定，第一PCIe设备通过执行与第二PCIe设备的车道协商来获得指示链路的可用车道数量的数字N。 然后，处理器确定N
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