公开(公告)号：US20240312789A1

公开(公告)日：2024-09-19

申请号：US18026095

申请日：2022-02-14

Applicant: HITACHI HIGH-TECH CORPORATION

Inventor： Takashi HATTORI ,  Masaki YAMADA ,  Keisuke AKINAGA

IPC: H01L21/311 ,  H01J37/32 ,  H01L21/324

CPC classification number: H01L21/31116 ,  H01J37/32522 ,  H01J37/32816 ,  H01L21/324 ,  H01J2237/3344 ,  H01J2237/3346

Abstract: A method for etching a silicon oxide film at a high selection ratio with respect to a silicon nitride film while a high etching rate of the silicon oxide film is balanced with a low etching rate of the silicon nitride film. The etching processing method is a dry etching processing method for etching a film without using plasma by supplying gas into a process chamber, the film having a side wall of a groove or a hole constituted by respective end parts of laminated film layers formed on a wafer, the laminated film layers including silicon oxide films each sandwiched between silicon nitride films, and in which the silicon oxide films are etched laterally from the end parts with the wafer being set to a low temperature equal to or less than (0.040x−42.0)° C. when a partial pressure of hydrogen fluoride gas is taken as x (Pa).

公开(公告)号：US20250014907A1

公开(公告)日：2025-01-09

申请号：US18896372

申请日：2024-09-25

Applicant: Hitachi High-Tech Corporation

Inventor： Takashi HATTORI ,  Yu ZHAO ,  Hiroyuki KOBAYASHI ,  Hiroto OTAKE

IPC: H01L21/311 ,  H01L21/02 ,  H01L21/3065 ,  H01L21/67

Abstract: Provided is an etching method for etching a silicon oxide film with a high accuracy at a high selection ratio with respect to a silicon nitride film, the etching method of etching a film structure, in which an end portion of a film layer in which the silicon oxide film and the silicon nitride film formed in advance on a wafer disposed in a processing chamber are alternately stacked in a vertical direction forms a side wall of a groove or a hole, by supplying processing gas into the processing chamber includes a step of supplying hydrogen fluoride and alcohol vapor into the processing chamber, maintaining the wafer at a temperature of −20° C. or lower, preferably −20° C. to −60° C., and etching the silicon oxide film from the end portion in a lateral direction.

公开(公告)号：US20240191348A1

公开(公告)日：2024-06-13

申请号：US17908798

申请日：2021-07-19

Applicant: Hitachi High-Tech Corporation

Inventor： Masaki YAMADA ,  Aki TAKEI ,  Yosuke KUROSAKI ,  Takashi HATTORI

IPC: C23C16/44 ,  C23C16/40 ,  C23C16/52 ,  H01L21/311 ,  H01L21/67

CPC classification number: C23C16/4405 ,  C23C16/402 ,  C23C16/52 ,  H01L21/31116 ,  H01L21/67069 ,  H01L21/67115

Abstract: An object of the invention is to provide a technique that can decrease a reaction product or residual HF in a chamber. A semiconductor manufacturing apparatus includes an inlet to introduce a processing gas containing vapor of hydrogen fluoride and vapor of alcohol into a processing room in a processing container, a sample stage disposed in the processing room and having an upper surface on which a wafer to be processed is placed, and an introduction mechanism to introduce a polar molecular gas to the inlet.