公开(公告)号：US07180330B2

公开(公告)日：2007-02-20

申请号：US10949251

申请日：2004-09-27

Applicant: Hiroki Kinugawa ,  Yoshinori Ishikawa

Inventor： Hiroki Kinugawa ,  Yoshinori Ishikawa

IPC: H03K19/175 ,  G05F1/10

CPC classification number: H03K17/063 ,  H03K17/0822

Abstract: An output circuit includes: a power supply unit; an output MIS transistor connected to the power supply unit; a reference MIS transistor that is connected to the power supply unit and is invariably in ON state; a current supply unit for generating a reference voltage Vref; an output terminal through which a current is supplied to a load circuit; a comparator; a logic circuit; and a control circuit for carrying out the ON/OFF control of the output MIS transistor. Comparison is made between the reference voltage Vref and output terminal voltage Vout by utilizing the ON-state resistances of the output and reference MIS transistors, thus detecting the magnitude of an output current. If the output current exceeds the target value, the output MIS transistor is turned OFF, thereby protecting it from an excessive current.

Abstract translation: 输出电路包括：电源单元; 连接到电源单元的输出MIS晶体管; 参考MIS晶体管，其连接到电源单元并且总是处于导通状态; 用于产生参考电压Vref的电流供应单元; 输出端子，电流被提供给负载电路; 比较器 一个逻辑电路; 以及用于执行输出MIS晶体管的ON / OFF控制的控制电路。 通过利用输出和参考MIS晶体管的导通电阻来比较参考电压Vref和输出端电压Vout，从而检测输出电流的大小。 如果输出电流超过目标值，则输出MIS晶体管截止，从而防止过电流。

公开(公告)号：US20050035745A1

公开(公告)日：2005-02-17

申请号：US10949251

申请日：2004-09-27

Applicant: Hiroki Kinugawa ,  Yoshinori Ishikawa

Inventor： Hiroki Kinugawa ,  Yoshinori Ishikawa

IPC: H03K17/08 ,  H03K17/06 ,  H03K17/082 ,  H03K17/687 ,  G05F1/70

CPC classification number: H03K17/063 ,  H03K17/0822

Abstract: An output circuit includes: a power supply unit; an output MIS transistor connected to the power supply unit; a reference MIS transistor that is connected to the power supply unit and is invariably in ON state; a current supply unit for generating a reference voltage Vref; an output terminal through which a current is supplied to a load circuit; a comparator; a logic circuit; and a control circuit for carrying out the ON/OFF control of the output MIS transistor. Comparison is made between the reference voltage Vref and output terminal voltage Vout by utilizing the ON-state resistances of the output and reference MIS transistors, thus detecting the magnitude of an output current. If the output current exceeds the target value, the output MIS transistor is turned OFF, thereby protecting it from an excessive current.

公开(公告)号：US06847231B2

公开(公告)日：2005-01-25

申请号：US10373857

申请日：2003-02-27

Applicant: Hiroki Kinugawa ,  Yoshinori Ishikawa

Inventor： Hiroki Kinugawa ,  Yoshinori Ishikawa

IPC: H03K17/08 ,  H03K17/06 ,  H03K17/082 ,  H03K17/687 ,  H03K19/175

CPC classification number: H03K17/063 ,  H03K17/0822

Abstract: An output circuit includes: a power supply unit; an output MIS transistor connected to the power supply unit; a reference MIS transistor that is connected to the power supply unit and is invariably in ON state; a current supply unit for generating a reference voltage Vref; an output terminal through which a current is supplied to a load circuit; a comparator; a logic circuit; and a control circuit for carrying out the ON/OFF control of the output MIS transistor. Comparison is made between the reference voltage Vref and output terminal voltage Vout by utilizing the ON-state resistances of the output and reference MIS transistors, thus detecting the magnitude of an output current. If the output current exceeds the target value, the output MIS transistor is turned OFF, thereby protecting it from an excessive current.

Abstract translation: 输出电路包括：电源单元; 连接到电源单元的输出MIS晶体管; 参考MIS晶体管，其连接到电源单元并且总是处于导通状态; 用于产生参考电压Vref的电流供应单元; 输出端子，电流被提供给负载电路; 比较器 一个逻辑电路; 以及用于执行输出MIS晶体管的ON / OFF控制的控制电路。 通过利用输出和参考MIS晶体管的导通电阻来比较参考电压Vref和输出端电压Vout，从而检测输出电流的大小。 如果输出电流超过目标值，则输出MIS晶体管截止，从而防止过电流。

公开(公告)号：US5699127A

公开(公告)日：1997-12-16

申请号：US519076

申请日：1995-08-24

Applicant: Hiroshi Ando ,  Hiroki Kinugawa ,  Masahiko Sasada ,  Minoru Miyata

Inventor： Hiroshi Ando ,  Hiroki Kinugawa ,  Masahiko Sasada ,  Minoru Miyata

IPC: H04N5/57 ,  H04N5/59

CPC classification number: H04N5/68 ,  H04N5/57 ,  H04N7/0122

Abstract: The object of the present invention is to easily compensate automatic brightness limiting performance and automatic contrast limiting performance even if a picture is displayed with a different aspect ratio and to prevent deterioration of picture quality such as gradation and sharpness. A picture display apparatus includes (1) an automatic brightness limiter (ABL) circuit including a comparison circuit for varying an EHT compensation starting point, an ABL gain control circuit for varying a slope of the EHT characteristic versus the APL, an ABL comparison voltage generator, a DAC for adjusting an ABL compensation starting point and a DAC for adjusting an ABL gain and (2) an automatic contrast limiter (ACL) circuit including another comparison circuit for varying an EHT compensation starting point, an ACL gain control circuit for varying a slope of the EHT characteristic versus the APL, an ACL comparison voltage generator, a DAC for adjusting an ACL compensation starting point and a DAC for adjusting an ACL gain.

Abstract translation: 本发明的目的是即使以不同的纵横比显示图像并且防止诸如灰度和锐度的图像质量的劣化，也容易地补偿自动亮度限制性能和自动对比度限制性能。 图像显示装置包括（1）包括用于改变EHT补偿起始点的比较电路的自动亮度限制器（ABL）电路，用于改变EHT特性对APL的斜率的ABL增益控制电路，ABL比较电压发生器 ，用于调整ABL补偿起始点的DAC和用于调整ABL增益的DAC，和（2）包括用于改变EHT补偿起始点的另一个比较电路的自动对比度限制器（ACL）电路，用于改变ABL增益的ACL增益控制电路 EHT特性与APL的斜率，ACL比较电压发生器，用于调整ACL补偿起始点的DAC和用于调整ACL增益的DAC。

公开(公告)号：US6023305A

公开(公告)日：2000-02-08

申请号：US872300

申请日：1997-06-10

Applicant: Hiroshi Ando ,  Nobuo Taketani ,  Tsuneo Matsukura ,  Hiroyasu Shimaoka ,  Hitoshi Adachi ,  Yoichi Kanegami ,  Hiroki Kinugawa

Inventor： Hiroshi Ando ,  Nobuo Taketani ,  Tsuneo Matsukura ,  Hiroyasu Shimaoka ,  Hitoshi Adachi ,  Yoichi Kanegami ,  Hiroki Kinugawa

IPC: G09G3/36 ,  G09G1/00 ,  G09G3/20 ,  G09G5/00 ,  G09G5/04 ,  G09G5/10 ,  H04N5/57 ,  H04N9/12 ,  H04N9/64 ,  H04N9/68 ,  H04N5/52 ,  H04N5/16

CPC classification number: G09G5/10 ,  H04N9/68 ,  G09G1/002 ,  G09G3/28 ,  G09G3/3611 ,  G09G5/04

Abstract: A primary color video output circuit for limiting an input video signal. The circuit includes a clipping circuit, a reference voltage generating circuit and an amplifier. The clipping circuit limits the level of the input video signal based on a reference voltage generated by the reference voltage generating circuit. The amplifier is then used to amplify the clipped video signal.

Abstract translation: 用于限制输入视频信号的原色视频输出电路。 电路包括限幅电路，参考电压产生电路和放大器。 限幅电路基于由参考电压产生电路产生的参考电压来限制输入视频信号的电平。 然后，放大器用于放大限幅视频信号。

公开(公告)号：US5657098A

公开(公告)日：1997-08-12

申请号：US510519

申请日：1995-08-02

Applicant: Hiroshi Ando ,  Hiroki Kinugawa ,  Masahiko Sasada

Inventor： Hiroshi Ando ,  Hiroki Kinugawa ,  Masahiko Sasada

IPC: H04N9/73 ,  H04N9/72 ,  H04N9/68

CPC classification number: H04N9/73

Abstract: Control circuits for the cut-off and drive control of video equipment. A first control device includes a cut-off control circuit and drive control circuit for use in conventional modes. A second control device includes a cut-off control circuit for mode switching and a drive control circuit for mode switching, independent of the first control device. The cut-off and drive adjustments made for every mode switching operation are unnecessary, and the mode switching based on off set data is possible.

Abstract translation: 用于视频设备的切断和驱动控制的控制电路。 第一控制装置包括用于常规模式的截止控制电路和驱动控制电路。 第二控制装置包括用于模式切换的截止控制电路和用于模式切换的驱动控制电路，与第一控制装置无关。 对于每个模式切换操作进行的切断和驱动调节是不必要的，并且基于关闭设定数据的模式切换是可能的。