Abstract:
A charge pump circuit is provided for reducing the voltage ripple and EMI associated with prior art circuits. The charge pump circuit is configured with at least one current source for suitably controlling the charging and/or discharging current in the charge pump capacitors the currents of the current sources are determined by the load current requirements, rather than the on-resistance of any switches or the ESR of any capacitors, thus allowing a significant reduction of the peak current drawn from the power supply as well as the peak current injected into the output reservoir capacitor. The charge pump circuit can be configured with a current source in series with the input supply voltage to control the total current in the charge pump. In addition, the charge pump circuit can be configured with current limited switches for controlling the total current. For example, current sources can be suitably configured to replace one or more switches in the charge pump circuit to effectively control the total current in the charge pump circuit. By feeding the charge pump capacitors with switched current sources, the voltage across the current sources can be suitably limited to the supply voltage or the output voltage. In addition, the current sources can operate as resistor devices with adjustable impedances, and be configured to suitably reduce or eliminate the excessive supply voltage across the current sources. Further, the switched current sources can comprise various current mirror configurations. As a result, the requirement for the breakdown voltage can be significantly reduced. In addition, through use of a low voltage process, the cost and packaging size can be suitably reduced.
Abstract:
Amplifier circuitry includes an input stage having a transconductance stage including first and second input transistors and a first tail current source, gates of the first and second input transistors being coupled to first and second input signals, respectively. A bulk electrode capacitance driver includes third and fourth input transistors and first and second associated cascode transistors and a second tail current source coupled to the sources and bulk electrodes of the third and fourth input transistors and to the bulk electrodes of the first and second input transistors. The gates of the third and fourth input transistors are coupled to the first and second input voltage signals, respectively, and the gates of the first and second cascode transistors are coupled to the second and first input voltage signals, respectively.
Abstract:
A charge pump circuit is configured for charging of parasitic capacitances associated with charge pump capacitors in a manner that minimizes voltage ripple. The charge pump circuit is suitably configured with an independent charging circuit configured for supplying the current needed to charge the parasitic capacitances, rather than utilizing the reservoir capacitor to supply the needed current. The independent charging circuit can be implemented with various configurations of charge pump circuits, such as single phase or dual phase charge pumps, and/or doubler, tripler or inverter configurations. The independent charging circuit includes a parasitic charging capacitor or other voltage source configured with one or more switch devices configured to facilitate charging of the parasitics during any phases of operation of the charge pump circuit. In addition, the independent charging circuit includes an independent cell, and is local to charge pump circuit for supplying the current for charging the parasitic capacitances, instead of having the current supplied through external bussing or wire bonds.
Abstract:
A charge pump circuit is configured for continuous control of the output of the charge pump circuit through continuous use of at least one charge pump capacitor coupled with a servo amplifier. During and between both phases of operation of the charge pump circuit, the output current from the servo amplifier can be set equal to the load current through a continuous path. This servo amplifier configuration facilitates the continuous regulation of the load current, during both phases of operation, as well as in between the phases, and as a result no load current is drawn from the output capacitor, thus requiring no recharge of the output capacitor. In addition, an exemplary charge pump circuit can be configured with level-shifting capabilities, the ability to facilitate the use of lower voltage processes, and the ability to provide a large DC open loop gain and high stability. In addition, an exemplary charge pump circuit can be configured with capabilities for buck/boost operation.
Abstract:
Amplifier circuitry includes an input stage having a transconductance stage including first and second input transistors and a first tail current source, gates of the first and second input transistors being coupled to first and second input signals, respectively. A bulk electrode capacitance driver includes third and fourth input transistors and first and second associated cascode transistors and a second tail current source coupled to the sources and bulk electrodes of the third and fourth input transistors and to the bulk electrodes of the first and second input transistors. The gates of the third and fourth input transistors are coupled to the first and second input voltage signals, respectively, and the gates of the first and second cascode transistors are coupled to the second and first input voltage signals, respectively.
Abstract:
A charge pump circuit is configured for suitably controlling the charging current in the charge pump capacitors. The charge pump circuit comprises an input current controlling circuit comprising a current limiting device for controlling the inrush current, and thus the charging current in the charge pump capacitors. The input current controlling circuit is configured to regulate the average voltage at the output of the current limiting device to correspond to the average voltage at the output of a pass device configured for regulating the output current. Accordingly, the total input current, and thus the charging current in the charge pump capacitors, can be suitably controlled at all times to significantly reduce the impact of any instantaneous charging currents.
Abstract:
A composite loop compensation circuit and method for a low drop-out regulator configured to facilitate stable operation at very low output load currents is provided. An exemplary low drop-out regulator includes an error amplifier, a pass device, and a composite loop compensation circuit. The compensation loop compensation circuit includes a plurality of segmented sense devices, a plurality of switches and a biasing component. The plurality of segmented sense devices are configured to sense an output load current, i.e., the current from the output terminal of the pass device. The plurality of switches are coupled between the plurality of segmented sense devices and a biasing component. Composite loop compensation circuit is configured to adjust the dominant first pole of the composite feedback loop based on the output load current through biasing of the active resistor component. As a result, the low drop-out regulator can include a very large pass device form addressing high currents and can remain stable for extremely low currents.