公开(公告)号：US20110165775A1

公开(公告)日：2011-07-07

申请号：US13004263

申请日：2011-01-11

申请人： Hanako Hirayama ,  Eisaku Watanabe

发明人： Hanako Hirayama ,  Eisaku Watanabe

IPC分类号： H01L21/28

CPC分类号： C23C14/0641 ,  C23C14/0036 ,  C23C14/046 ,  C23C14/542

摘要： According to the present invention, a thin film having a desired thickness is formed on an inner sidewall of a step with excellent step coverage in a film forming step and an etching step at least once, respectively. In an embodiment of the present invention, a target material is deposited on a substrate (17) having a concave step (31, 32) having an opening width or opening diameter of 3 μm or less and an aspect ratio of 1 or more. At this time, a film forming method according to the present invention has a first step of depositing a thin film onto a bottom (33) of the step (31, 32) and a second step of forming a film on an inner sidewall (34) of the step (31, 32) by re-sputtering the thin film deposited on the bottom (33) and the pressure in a process chamber in the second step is set lower than that in the process chamber in the first step and the ratio of anode power to cathode power in the second step is set greater than the power ratio in the first step.

摘要翻译： 根据本发明，在成膜步骤和蚀刻步骤中分别具有优异的阶梯覆盖度的步骤的内侧壁上分别形成具有期望厚度的薄膜。 在本发明的一个实施例中，将目标材料沉积在具有开口宽度或开口直径为3μm以下，纵横比为1以上的凹形台阶（31,32）的基板（17）上。 此时，根据本发明的成膜方法具有将薄膜沉积到台阶（31,32）的底部（33）上的第一步骤和在内侧壁（34）上形成薄膜的第二步骤 ）通过再沉积在底部（33）上的薄膜和第二步骤中的处理室中的压力而设置为比第一步骤中的处理室低，并且比率 在第二步骤中阳极功率与阴极功率的关系设定为大于第一步骤中的功率比。

公开(公告)号：US08278211B2

公开(公告)日：2012-10-02

申请号：US13004263

申请日：2011-01-11

申请人： Hanako Hirayama ,  Eisaku Watanabe

发明人： Hanako Hirayama ,  Eisaku Watanabe

IPC分类号： H01L21/44

CPC分类号： C23C14/0641 ,  C23C14/0036 ,  C23C14/046 ,  C23C14/542

摘要： According to the present invention, a thin film having a desired thickness is formed on an inner sidewall of a step with excellent step coverage in a film forming step and an etching step at least once, respectively. In an embodiment of the present invention, a target material is deposited on a substrate (17) having a concave step (31, 32) having an opening width or opening diameter of 3 μm or less and an aspect ratio of 1 or more. At this time, a film forming method according to the present invention has a first step of depositing a thin film onto a bottom (33) of the step (31, 32) and a second step of forming a film on an inner sidewall (34) of the step (31, 32) by re-sputtering the thin film deposited on the bottom (33) and the pressure in a process chamber in the second step is set lower than that in the process chamber in the first step and the ratio of anode power to cathode power in the second step is set greater than the power ratio in the first step.

摘要翻译： 根据本发明，在成膜步骤和蚀刻步骤中分别具有优异的阶梯覆盖度的步骤的内侧壁上分别形成具有期望厚度的薄膜。 在本发明的一个实施例中，将目标材料沉积在具有开口宽度或开口直径为3μm以下，纵横比为1以上的凹形台阶（31,32）的基板（17）上。 此时，根据本发明的成膜方法具有将薄膜沉积到台阶（31,32）的底部（33）上的第一步骤和在内侧壁（34）上形成薄膜的第二步骤 ）通过再沉积在底部（33）上的薄膜和第二步骤中的处理室中的压力而设置为比第一步骤中的处理室低，并且比率 在第二步骤中阳极功率与阴极功率的关系设定为大于第一步骤中的功率比。

公开(公告)号：US20110312178A1

公开(公告)日：2011-12-22

申请号：US13097529

申请日：2011-04-29

申请人： Eisaku Watanabe ,  Tetsuro Ogata ,  Franck Ernult

发明人： Eisaku Watanabe ,  Tetsuro Ogata ,  Franck Ernult

IPC分类号： H01L21/283 ,  C23C14/34 ,  C23C14/14

CPC分类号： H01L45/06 ,  C23C14/0094 ,  C23C14/025 ,  C23C14/0641 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/144 ,  H01L45/1625

摘要： The present invention provides a method for manufacturing a semiconductor memory element including a chalcogenide material layer and an electrode layer, each having an improved adhesion, and a sputtering apparatus thereof. One embodiment of the present invention is the method for manufacturing a semiconductor memory element including: a first step of forming the chalcogenide material layer (113); and a second step of forming a second electrode layer (114b) on the chalcogenide material layer (113) by sputtering through the use of a mixed gas of a reactive gas and an inert gas, while applying a cathode voltage to a target. In the second step, introduction of the reactive gas is carried out at a flow rate ratio included in a hysteresis area (40) appearing in the relationship between a cathode voltage applied to the cathode and the flow rate ratio of the reactive gas in the mixed gas.

摘要翻译： 本发明提供一种制造半导体存储元件的方法，该半导体存储元件包括硫族化物材料层和电极层，它们各自具有改进的粘合性，及其溅射装置。 本发明的一个实施例是一种制造半导体存储元件的方法，包括：形成硫族化物材料层（113）的第一步骤; 以及通过使用反应气体和惰性气体的混合气体通过溅射在硫属化物材料层（113）上形成第二电极层（114b）的第二步骤，同时向目标施加阴极电压。 在第二步骤中，反应气体的引入以包含在施加于阴极的阴极电压与混合气体的反应气体的流量比的滞后区域（40）中的流量比进行， 加油站。

公开(公告)号：US08303785B2

公开(公告)日：2012-11-06

申请号：US12979968

申请日：2010-12-28

申请人： Yoh Tanaka ,  Kazuya Konaga ,  Eisaku Watanabe ,  Eitaro Morimoto

发明人： Yoh Tanaka ,  Kazuya Konaga ,  Eisaku Watanabe ,  Eitaro Morimoto

IPC分类号： C23C14/34

CPC分类号： C23C14/34 ,  C23C14/564 ,  H01J37/34 ,  H01J37/3441

摘要： A plasma processing apparatus includes a chamber, substrate stage, electrode, conductive members, and deposition shield. The chamber is maintained at a predetermined potential. The substrate stage serves to hold a substrate within the chamber. The electrode serves to generate a plasma inside the chamber by applying AC power to the chamber. The conductive members connect the substrate stage and the side wall of the chamber by surrounding the plasma space between the substrate stage and the electrode in plasma formation, and at least some of them are separated by being moved by a driving mechanism so as to form an opening for loading a substrate onto the substrate stage while no plasma is being formed. The deposition shield covers the surfaces of the conductive members on the side of the plasma space.

摘要翻译： 等离子体处理装置包括室，衬底台，电极，导电构件和沉积屏蔽。 室保持在预定的电位。 衬底台用于将衬底保持在腔室内。 电极用于通过向腔室施加AC电力来在室内产生等离子体。 导电构件通过在等离子体形成中围绕衬底台和电极之间的等离子体空间来连接衬底台和腔室的侧壁，并且其中的至少一些通过由驱动机构移动而分离，以形成 用于将衬底加载到衬底台上而不形成等离子体的开口。 沉积屏蔽覆盖等离子体空间一侧的导电构件的表面。

公开(公告)号：US08278212B2

公开(公告)日：2012-10-02

申请号：US13097529

申请日：2011-04-29

申请人： Eisaku Watanabe ,  Tetsuro Ogata ,  Franck Ernult

发明人： Eisaku Watanabe ,  Tetsuro Ogata ,  Franck Ernult

IPC分类号： H01L21/44

CPC分类号： H01L45/06 ,  C23C14/0094 ,  C23C14/025 ,  C23C14/0641 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/144 ,  H01L45/1625

摘要： The present invention provides a method for manufacturing a semiconductor memory element including a chalcogenide material layer and an electrode layer, each having an improved adhesion, and a sputtering apparatus thereof. One embodiment of the present invention is the method for manufacturing a semiconductor memory element including: a first step of forming the chalcogenide material layer (113); and a second step of forming a second electrode layer (114b) on the chalcogenide material layer (113) by sputtering through the use of a mixed gas of a reactive gas and an inert gas, while applying a cathode voltage to a target. In the second step, introduction of the reactive gas is carried out at a flow rate ratio included in a hysteresis area (40) appearing in the relationship between a cathode voltage applied to the cathode and the flow rate ratio of the reactive gas in the mixed gas.

摘要翻译： 本发明提供一种制造半导体存储元件的方法，该半导体存储元件包括硫族化物材料层和电极层，它们各自具有改进的粘合性，及其溅射装置。 本发明的一个实施例是一种制造半导体存储元件的方法，包括：形成硫族化物材料层（113）的第一步骤; 以及通过使用反应气体和惰性气体的混合气体通过溅射在硫属化物材料层（113）上形成第二电极层（114b）的第二步骤，同时向目标施加阴极电压。 在第二步骤中，反应气体的引入以包含在施加于阴极的阴极电压与混合气体的反应气体的流量比的滞后区域（40）中的流量比进行， 加油站。

公开(公告)号：US08778145B2

公开(公告)日：2014-07-15

申请号：US13116204

申请日：2011-05-26

申请人： Eisaku Watanabe ,  Tetsuro Ogata

发明人： Eisaku Watanabe ,  Tetsuro Ogata

IPC分类号： C23C14/35

CPC分类号： C23C14/35 ,  H01J37/3408 ,  H01J37/3452 ,  H01J37/3455

摘要： When a film is formed by using a sputter method, distribution variation due to a progress of target erosion generated during the film formation is suppressed, and film thickness distribution and resistance value distribution are corrected to an optimal state. In order to maintain the magnetic flux density formed on the target surface at a constant level, the distance between the target surface and the magnet surface (MT distance) is corrected in accordance with the progress of the target erosion. Further, two or more MT distances are set by a process recipe or the like while forming a thin film, and different distribution shapes are combined to form a near flat distribution shape.

摘要翻译： 当通过使用溅射法形成膜时，抑制了由于在成膜期间产生的目标腐蚀进行的分布变化，并将膜厚度分布和电阻值分布校正到最佳状态。 为了将形成在目标表面上的磁通密度保持在恒定水平，根据目标侵蚀的进行来校正目标表面和磁体表面之间的距离（MT距离）。 此外，在形成薄膜的同时通过处理配方等设定两个以上的MT距离，并且组合不同的分布形状以形成接近平坦的分布形状。

公开(公告)号：US20110259733A1

公开(公告)日：2011-10-27

申请号：US13116204

申请日：2011-05-26

申请人： Eisaku Watanabe ,  Tetsuro Ogata

发明人： Eisaku Watanabe ,  Tetsuro Ogata

IPC分类号： C23C14/35

CPC分类号： C23C14/35 ,  H01J37/3408 ,  H01J37/3452 ,  H01J37/3455

摘要： When a film is formed by using a sputter method, distribution variation due to a progress of target erosion generated during the film formation is suppressed, and film thickness distribution and resistance value distribution are corrected to an optimal state. In order to maintain the magnetic flux density formed on the target surface at a constant level, the distance between the target surface and the magnet surface (MT distance) is corrected in accordance with the progress of the target erosion. Further, two or more MT distances are set by a process recipe or the like while forming a thin film, and different distribution shapes are combined to form a near flat distribution shape.

摘要翻译： 当通过使用溅射法形成膜时，抑制了由于在成膜期间产生的目标腐蚀进行的分布变化，并将膜厚度分布和电阻值分布校正到最佳状态。 为了将形成在目标表面上的磁通密度保持在恒定水平，根据目标侵蚀的进行来校正目标表面和磁体表面之间的距离（MT距离）。 此外，在形成薄膜的同时通过处理配方等设定两个以上的MT距离，并且组合不同的分布形状以形成接近平坦的分布形状。