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公开(公告)号：US10778234B2
公开(公告)日：2020-09-15
申请号：US16204790
申请日：2018-11-29
摘要： A clock generation circuit and a clock signal generation method are disclosed. In the method, a direct current bias circuit in a first clock source superimposes a first direct current voltage on a first clock signal output by a first oscillation circuit, to generate a second clock signal; and a logical operation is performed on the second clock signal and a third clock signal that is generated by a second clock source, to generate a fourth clock signal. The fourth clock signal is used as a signal output by a clock generation circuit. In the method, when the first oscillation circuit cannot normally work, the clock generation circuit can still output a correct clock signal. This avoids clock signal interruption when switching is performed from the first clock source to the second clock source.
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公开(公告)号：US11444362B2
公开(公告)日：2022-09-13
申请号：US16908321
申请日：2020-06-22
发明人： Jie Sun , Yan Gao , Zhixiong Zeng
摘要： Embodiments of this application disclose a signal processing circuit, a radio frequency signal transmitter, and a communications device, and relate to the field of electronic device technologies, to improve power amplification efficiency of the signal processing circuit. The signal processing circuit includes: a splitter, a radio frequency signal converter, a first branch power amplifier, a second branch power amplifier, and a combiner. The splitter is connected to the radio frequency signal converter, the radio frequency signal converter is connected to the first branch power amplifier and the second branch power amplifier, and the first branch power amplifier and the second branch power amplifier are connected to the combiner.
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