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公开(公告)号:US20210098691A1
公开(公告)日:2021-04-01
申请号:US17120667
申请日:2020-12-14
Applicant: Huawei Technologies Co., Ltd.
Inventor: Wen Yang , Yanxiang Liu
Abstract: This application provides a memory including a transistor and an MTJ storage element; a bottom electrode of the MTJ storage element is electrically connected to a drain electrode of the transistor by using a conduction structure; wiring layers are disposed between the transistor and the MTJ storage element in the storage area, and a dielectric layer is filled between adjacent wiring layers; the conduction structure includes a first conduction part, and the first conduction part includes a first metal wire, a second metal wire, and a first via hole; the wiring layers comprise a first wiring layer, a second wiring layer, and a third wiring layer; the first via hole penetrates a dielectric layer and the third wiring layer that are located between the first wiring layer and the second wiring layer.
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公开(公告)号:US12079472B2
公开(公告)日:2024-09-03
申请号:US17732675
申请日:2022-04-29
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor: Bang Liu , Liyu Wang , Kun Guan , Wen Yang , Jianqiang Shen
IPC: G06F3/06
CPC classification number: G06F3/0608 , G06F3/064 , G06F3/0671
Abstract: A data reduction method, apparatus, and computing device and a storage medium are provided. The method includes: when reduction is to be performed on a to-be-reduced data block, obtaining a fingerprint of the to-be-reduced data block; forming an index set based on the fingerprint of the to-be-reduced data block by using index information of data blocks with identical fingerprints; and performing, in the to-be-reduced data block based on the fingerprint of the to-be-reduced data block, data reduction processing on a data block to which index information in a same index set belongs.
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公开(公告)号:US11957062B2
公开(公告)日:2024-04-09
申请号:US17120667
申请日:2020-12-14
Applicant: Huawei Technologies Co., Ltd.
Inventor: Wen Yang , Yanxiang Liu
Abstract: A memory includes a transistor and a magnetic tunnel junction (MTJ) storage element, a bottom electrode of the MTJ storage element is electrically connected to a drain electrode of the transistor using a conduction structure, wiring layers are disposed between the transistor and the MTJ storage element in the storage area, and a dielectric layer is filled between adjacent wiring layers, the conduction structure includes a first conduction part, and the first conduction part includes a first metal wire, a second metal wire, and a first via hole, the wiring layers comprise a first wiring layer, a second wiring layer, and a third wiring layer, the first via hole penetrates a dielectric layer and the third wiring layer that are located between the first wiring layer and the second wiring layer.
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公开(公告)号:US20240020005A1
公开(公告)日:2024-01-18
申请号:US18475849
申请日:2023-09-27
Applicant: Huawei Technologies Co., Ltd.
Inventor: Bang Liu , Kai Zhu , Ke Li , Wen Yang , Jianqiang Shen
IPC: G06F3/06
CPC classification number: G06F3/0608 , G06F3/0641 , G06F3/0673
Abstract: A data compression method includes providing one or more data block sets, where each data block set includes a plurality of data blocks with a same fingerprint; providing one or more compression groups based on a similarity degree between a plurality of data blocks included in each data block set, where one compression group includes a plurality of similar data blocks, the plurality of similar data blocks are a subset of data blocks included in the one or more data block sets, and a similarity degree between the plurality of similar data blocks meets a specific similarity condition; and compressing the plurality of similar data blocks included in the compression group.
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公开(公告)号:US11088032B2
公开(公告)日:2021-08-10
申请号:US16239401
申请日:2019-01-03
Applicant: Huawei Technologies Co., Ltd.
Inventor: Wen Yang , Riqing Zhang , Yu Xia
IPC: H01L21/8238 , H01L29/778 , H01L21/265 , H01L29/739 , H01L29/786 , H01L29/66 , H01L21/02 , H01L27/092 , H01L29/24
Abstract: In embodiments of the present disclosure, an ambient medium of a two-dimensional semiconductor is doped or an ambient medium of a semiconductor is locally filled with a solid material, to form a filled region, and an electronic device based on the two-dimensional semiconductor is implemented by means of a doping effect of the doped region or the filled region on a characteristic of the two-dimensional semiconductor. In the embodiments of the present disclosure, doping the two-dimensional semiconductor is not directly processing the two-dimensional semiconductor. Therefore, damage caused to the two-dimensional semiconductor in a doping process and device performance deterioration caused accordingly can be effectively reduced, and stability of device performance after doping is improved.
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6.
公开(公告)号:US20190139835A1
公开(公告)日:2019-05-09
申请号:US16239401
申请日:2019-01-03
Applicant: Huawei Technologies Co., Ltd.
Inventor: Wen Yang , Riqing Zhang , Yu Xia
IPC: H01L21/8238 , H01L21/265 , H01L27/092 , H01L21/02
Abstract: In embodiments of the present disclosure, an ambient medium of a two-dimensional semiconductor is doped or an ambient medium of a semiconductor is locally filled with a solid material, to form a filled region, and an electronic device based on the two-dimensional semiconductor is implemented by means of a doping effect of the doped region or the filled region on a characteristic of the two-dimensional semiconductor. In the embodiments of the present disclosure, doping the two-dimensional semiconductor is not directly processing the two-dimensional semiconductor. Therefore, damage caused to the two-dimensional semiconductor in a doping process and device performance deterioration caused accordingly can be effectively reduced, and stability of device performance after doping is improved.
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