Image deployment method and apparatus

    公开(公告)号:US10552133B2

    公开(公告)日:2020-02-04

    申请号:US15492940

    申请日:2017-04-20

    Abstract: This application discloses an image deployment method, where the image deployment method is applied to a container system. Information about an image that has been deployed on each host is collected. After an image tag of a to-be-deployed image is obtained, a degree of overlapping between the image that has been deployed on each host and the to-be-deployed image is determined. A host with a higher overlapping degree needs to download a smaller amount of data when deploying the to-be-deployed image and deploys the to-be-deployed image at a higher speed. Finally, a management node selects, according to overlapping degrees of the hosts, a deployment host for deploying the to-be-deployed image.

    CHARGING PROTECTION CIRCUIT, CHARGING CIRCUIT, AND ELECTRONIC DEVICE

    公开(公告)号:US20240355811A1

    公开(公告)日:2024-10-24

    申请号:US18649658

    申请日:2024-04-29

    Abstract: This application relates to a charging protection circuit. The charging protection circuit implements overcurrent protection by using a four-terminal NMOS switching transistor. In the solution provided in this application, floating management is performed on a Sub port of the four-terminal NMOS switching transistor. Specifically, when the four-terminal NMOS switching transistor is turned on, potential of the Sub port is pulled up, to avoid an excessively large internal resistance of the four-terminal NMOS switching transistor caused by an excessively large voltage between the Sub port and a drain of the four-terminal NMOS switching transistor. In addition, this application further provides a charging circuit and an electronic device.

    Charging protection circuit, charging circuit, and electronic device

    公开(公告)号:US12002801B2

    公开(公告)日:2024-06-04

    申请号:US17852476

    申请日:2022-06-29

    Abstract: This application relates to a charging protection circuit. The charging protection circuit implements overcurrent protection by using a four-terminal NMOS switching transistor. In the solution provided in this application, floating management is performed on a Sub port of the four-terminal NMOS switching transistor. Specifically, when the four-terminal NMOS switching transistor is turned on, potential of the Sub port is pulled up, to avoid an excessively large internal resistance of the four-terminal NMOS switching transistor caused by an excessively large voltage between the Sub port and a drain of the four-terminal NMOS switching transistor. In addition, this application further provides a charging circuit and an electronic device.

    Image Deployment Method and Apparatus
    4.
    发明申请

    公开(公告)号:US20180196680A1

    公开(公告)日:2018-07-12

    申请号:US15916895

    申请日:2018-03-09

    Abstract: An image deployment method includes obtaining a configuration policy for a container, where the configuration policy for the container includes an autoscaling policy or a replication control policy. The autoscaling policy includes a first image identifier, a maximum quantity of containers corresponding to the first image identifier that can be deployed, and a quantity of currently deployed containers corresponding to the first image identifier. The replication control policy includes a second image identifier and a quantity of containers corresponding to the second image identifier that are expected to be deployed. The method determines an identifier of a to-be-deployed image according to the configuration policy for the container.

    Off-grid phase splitter and inverter system

    公开(公告)号:US11632056B2

    公开(公告)日:2023-04-18

    申请号:US17471701

    申请日:2021-09-10

    Abstract: In an embodiment, an off-grid phase splitter includes: a first input port and a second input port that are separately connected to a power supply; a first output port and a second output port that provide a second voltage, and the second output port and a third output port provide a third voltage; a first capacitor connected between the first output port and the second output port; a second capacitor connected between the second output port and the third output port; a first switch circuit and a second switch circuit connected in series to form a first node between the first input port and the second input port, where the first switch circuit and the second switch circuit are unidirectionally switched on in opposite directions,; and an inductor connected between the first node and the second output port.

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