公开(公告)号：US20230198512A1

公开(公告)日：2023-06-22

申请号：US18170575

申请日：2023-02-17

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Fayou YIN ,  Boning HUANG ,  Wentao YANG ,  Quan ZHANG ,  Qian ZHAO

IPC: H03K17/0412 ,  H03K17/16

CPC classification number: H03K17/04123 ,  H03K17/162

Abstract: A driver metal-oxide-semiconductor field-effect transistor DrMOS, an integrated circuit, an electronic device, and a preparation method are provided. The DrMOS mainly includes a first die and a second die. The first die includes a drive circuit and a first switching transistor, and the drive circuit is connected to a gate of the first switching transistor. The second die includes a second switching transistor, and the drive circuit is connected to a gate of the second switching transistor through a first conductor. The drive circuit and the first switching transistor are prepared in a same die. This helps to reduce an area, loss, and costs of the DrMOS. The first switching transistor and the second switching transistor are prepared in different dies that reduces type selection limitation.

公开(公告)号：US20230112034A1

公开(公告)日：2023-04-13

申请号：US18064355

申请日：2022-12-12

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Gun YANG ,  Fayou YIN

IPC: H01L23/31 ,  H01L23/00 ,  H01L23/16 ,  H01L23/50 ,  H01L21/02

Abstract: The technology of this application relates to a switching power module that includes a substrate, a die embedded in the substrate, and a packaging layer. The packaging layer covers an integrated circuit layout layer of the die. The packaging layer packages the integrated circuit layout layer of the die, the die includes a composite material layer covering the integrated circuit layout layer, and the composite material layer includes at least two material layers that have different functions. The at least two material layers include a first material layer covering the integrated circuit layout layer, the first material layer is a mixed layer of undoped silicate glass and tetraethyl orthosilicate, and the first material layer is filled in a gap between metal protrusions of the integrated circuit layout layer, thereby improving an isolation effect between the metal protrusions. The mixed layer of the undoped silicate glass and the tetraethyl orthosilicate has a good thermal stress effect.