Phase lock loop circuit based signal generation in an optical measurement system

    公开(公告)号:US11575382B2

    公开(公告)日:2023-02-07

    申请号:US17559774

    申请日:2021-12-22

    Applicant: HI LLC

    Abstract: An exemplary system includes a PLL circuit and a precision timing circuit connected to the PLL circuit. The PLL circuit has a PLL feedback period defined by a reference clock and includes a voltage controlled oscillator configured to lock to the reference clock and having a plurality of stages configured to output a plurality of fine phase signals each having a different phase, and a feedback divider configured to be clocked by a single fine phase signal included in the plurality of fine phase signals and have a plurality of feedback divider states during the PLL feedback period. The precision timing circuit is configured to generate a timing pulse and set, based on a first combination of one of the fine phase signals and one of the feedback divider states, a temporal position of the timing pulse within the PLL feedback period.

    Maintaining Consistent Photodetector Sensitivity in an Optical Measurement System

    公开(公告)号:US20210290068A1

    公开(公告)日:2021-09-23

    申请号:US17202563

    申请日:2021-03-16

    Applicant: HI LLC

    Abstract: An exemplary optical measurement system includes a light source configured to emit light directed at a target. The optical measurement system further includes a photodetector configured to detect a photon of the light after the light is scattered by the target. The optical measurement system further includes a control circuit configured to receive a first input voltage that is a temperature-dependent voltage. The control circuit is further configured to receive a second input voltage that is a temperature-invariant voltage. The control circuit is further configured to output, based on a combination of the first input voltage and the second input voltage, a bias voltage for the photodetector, wherein the combination of the first and second input voltages is configured to cause the bias voltage to vary based on temperature.

    Device Enumeration in an Optical Measurement System

    公开(公告)号:US20210290065A1

    公开(公告)日:2021-09-23

    申请号:US17202548

    申请日:2021-03-16

    Applicant: HI LLC

    Abstract: An exemplary system includes a processor, a wearable device comprising a plurality of slots, and a first module including a plurality of detectors and a module control circuit. The processor is configured to successively transmit, to each slot of the plurality of slots, a command to enable a respective module located in each slot. The processor is further configured to determine, based on an acknowledgment received from the module control circuit, that the first module is enabled and located in a first slot, and to successively transmit, based on the determining that the first module is enabled and located in the first slot, a plurality of detector address identifiers. The module control circuit is configured to successively place the plurality of detectors into an enumeration mode in which each detector of the plurality of detectors is assigned a different detector address identifier of the plurality of detector address identifiers.

    Phase Lock Loop Circuit Based Adjustment of a Measurement Time Window in an Optical Measurement System

    公开(公告)号:US20230229878A1

    公开(公告)日:2023-07-20

    申请号:US18126786

    申请日:2023-03-27

    Applicant: HI LLC

    CPC classification number: G06K7/10732 G02B27/0172 G06K7/10851

    Abstract: An illustrative system may include a TDC configured to monitor for an occurrence of a photodetector output pulse during a measurement time window that is within and shorter in duration than a light pulse time period, the photodetector output pulse generated by a photodetector when the photodetector detects a photon from a light pulse having a light pulse time period; a PLL circuit for the TDC and having a PLL feedback period defined by a reference clock, the PLL circuit configured to: output a plurality of fine phase signals and output one or more signals representative of a plurality of feedback divider states during the PLL feedback period; and a precision timing circuit configured to adjust, based on one or more of the fine phase signals and/or the feedback divider states, a temporal position of the measurement time window within the light pulse time period.

    Data Aggregation and Power Distribution in Time Domain-Based Optical Measurement Systems

    公开(公告)号:US20220280110A1

    公开(公告)日:2022-09-08

    申请号:US17680828

    申请日:2022-02-25

    Applicant: HI LLC

    Abstract: An illustrative optical measurement system may include a primary controller; a plurality of secondary controllers communicatively coupled to the primary controller; and a plurality of modules, each module included in the plurality of modules comprising: a light source configured to emit light directed at a target, and a plurality of detectors configured to detect photon arrival times for the light after the light is scattered by the target; wherein: the plurality of modules is divided into a plurality of module subsets, and each module subset included in the plurality of module subsets is communicatively coupled to a respective secondary controller included in the plurality of secondary controllers.

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