公开(公告)号：US20250139027A1

公开(公告)日：2025-05-01

申请号：US18923025

申请日：2024-10-22

Applicant: Google LLC

Inventor： Horia Alexandru Toma ,  Rahul Nagarajan ,  Yujeong Shim ,  Rammohan Padmanabhan

IPC: G06F13/16 ,  G06F13/40

Abstract: Generally disclosed herein are electronic circuits with high bandwidth interfaces (HBI) for multi-directional die-to-die communications. The HBIs are designed to allow for sharing of data between all sides of the memory chiplets. By using all sides of the memory chiplets and multiplexing the data between the multiple connected chiplets, the total bandwidth of the memory available to the connected chiplets can increase. The sharing and multiplexing of the data can also be dynamically configured to accommodate various options for the allocation of performance levels and the associated cost.

公开(公告)号：US20240118740A1

公开(公告)日：2024-04-11

申请号：US17961155

申请日：2022-10-06

Applicant: Google LLC

Inventor： Houle Gan ,  Shuai Jiang ,  Sanjay Nilamboor ,  Rammohan Padmanabhan ,  Mohamed Elgebaly

IPC: G06F1/3296 ,  G06F1/329 ,  G06F9/48

CPC classification number: G06F1/3296 ,  G06F1/329 ,  G06F9/4893

Abstract: A method and system of tuning a voltage regulator including receiving, at a voltage regulator, workload information for a workload to be executed by a processor that receives power from the voltage regulator; setting at least one of a load line value for the voltage regulator, a setpoint voltage supplied by the voltage regulator to the processor, or a phase shedding configuration of the voltage regulator based on the workload information; and sending to the processor, after the setting is complete, an acknowledgement signal indicating that the workload can proceed.