公开(公告)号：US20240250158A1

公开(公告)日：2024-07-25

申请号：US18438882

申请日：2024-02-12

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Judson R. Holt ,  Vibhor Jain ,  Alexander M. Derrickson

IPC: H01L29/739 ,  H01L29/06 ,  H01L29/66

CPC classification number: H01L29/7393 ,  H01L29/0649 ,  H01L29/66325

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor and methods of manufacture. The structure includes: an extrinsic base region; an emitter region on a first side of the extrinsic base region; a collector region on a second side of the extrinsic base region; and a gate structure comprising a gate oxide and a gate control in a same channel region as the extrinsic base region.

公开(公告)号：US20240136400A1

公开(公告)日：2024-04-25

申请号：US18405621

申请日：2024-01-05

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Alexander Derrickson ,  Vibhor Jain ,  Judson R. Holt ,  Jagar Singh ,  Mankyu Yang

IPC: H01L29/08 ,  H01L29/06 ,  H01L29/10 ,  H01L29/417 ,  H01L29/735 ,  H01L29/737

CPC classification number: H01L29/0821 ,  H01L29/0649 ,  H01L29/0808 ,  H01L29/0817 ,  H01L29/1008 ,  H01L29/41708 ,  H01L29/735 ,  H01L29/737

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor with gated collector and methods of manufacture. The structure includes: an extrinsic base region vertically over a semiconductor substrate and comprising asymmetrical sidewall spacers on opposing sidewalls of the extrinsic base region; a collector region on the semiconductor substrate and separated from the extrinsic base region by at least a first spacer of the asymmetrical sidewall spacers; and an emitter region on the semiconductor substrate and separated from the extrinsic base region by a second spacer of the asymmetrical sidewall spacers.

公开(公告)号：US20240021713A1

公开(公告)日：2024-01-18

申请号：US18373598

申请日：2023-09-27

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Haiting Wang ,  Alexander Derrickson ,  Jagar Singh ,  Vibhor Jain ,  Andreas Knorr ,  Alexander Martin ,  Judson R. Holt ,  Zhenyu Hu

IPC: H01L29/735 ,  H01L29/66 ,  H01L29/737 ,  H01L29/08 ,  H01L29/417

CPC classification number: H01L29/735 ,  H01L29/6625 ,  H01L29/737 ,  H01L29/0808 ,  H01L29/41708 ,  H01L29/0821

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor and methods of manufacture. A structure includes: an intrinsic base comprising semiconductor material in a channel region of a semiconductor substrate; an extrinsic base vertically above the intrinsic base; a raised collector region on the semiconductor substrate and laterally connected to the intrinsic base; and a raised emitter region on the semiconductor substate and laterally connected to the intrinsic base.

公开(公告)号：US11869958B2

公开(公告)日：2024-01-09

申请号：US17745280

申请日：2022-05-16

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Judson R. Holt ,  Shesh Mani Pandey ,  Vibhor Jain

IPC: H01L29/737 ,  H01L29/66 ,  H01L29/08 ,  H01L29/10

CPC classification number: H01L29/7371 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/66242

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to heterojunction bipolar transistors and methods of manufacture. The structure includes: a collector in a semiconductor substrate; a subcollector in the semiconductor substrate; an intrinsic base over the subcollector; an extrinsic base adjacent to the intrinsic base; an emitter over the intrinsic base; and an isolation structure between the extrinsic base and the emitter and which overlaps the subcollector.

公开(公告)号：US11804542B2

公开(公告)日：2023-10-31

申请号：US17557176

申请日：2021-12-21

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Alexander M. Derrickson ,  Arkadiusz Malinowski ,  Jagar Singh ,  Mankyu Yang ,  Judson R. Holt

IPC: H01L29/737 ,  H01L29/165 ,  H01L29/66 ,  H01L29/10 ,  H01L29/08

CPC classification number: H01L29/7371 ,  H01L29/0817 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/165 ,  H01L29/66242

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to annular bipolar transistors and methods of manufacture. The structure includes: a substate material; a collector region parallel to and above the substrate material; an intrinsic base region surrounding the collector region; an emitter region above the intrinsic base region; and an extrinsic base region contacting the intrinsic base region.

公开(公告)号：US20230290829A1

公开(公告)日：2023-09-14

申请号：US17804201

申请日：2022-05-26

Applicant: GlobalFoundries U.S. Inc.

Inventor： Peter Baars ,  Alexander M. Derrickson ,  Ketankumar Harishbhai Tailor ,  Zhixing Zhao ,  Judson R. Holt

IPC: H01L29/10 ,  H01L29/66 ,  H01L29/735

CPC classification number: H01L29/1004 ,  H01L29/66234 ,  H01L29/735

Abstract: Embodiments of the disclosure provide a bipolar transistor structure having a base with a varying horizontal width and methods to form the same. The bipolar transistor structure includes a first emitter/collector (E/C) layer on an insulator layer. A base layer is over the insulator layer. A spacer between the first E/C layer and the base layer. The base layer includes a lower base region, and the spacer is adjacent to the lower base region and the first E/C layer. An upper base region is on the lower base region and the spacer. A horizontal width of the upper base region is larger than a horizontal width of the lower base region.

公开(公告)号：US20230223462A1

公开(公告)日：2023-07-13

申请号：US17657154

申请日：2022-03-30

Applicant: GlobalFoundries U.S. Inc.

Inventor： Hong Yu ,  Alexander M. Derrickson ,  Judson R. Holt

IPC: H01L29/73 ,  H01L29/66 ,  H01L29/08 ,  H01L29/10 ,  H01L29/06

CPC classification number: H01L29/73 ,  H01L29/66234 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1095 ,  H01L29/0653

Abstract: Embodiments of the disclosure provide a bipolar transistor structure including a semiconductor fin on a substrate. The semiconductor fin has a first doping type, a length in a first direction, and a width in a second direction perpendicular to the first direction. A first emitter/collector (E/C) material is adjacent a first sidewall of the semiconductor fin along the width of the semiconductor fin. The first E/C material has a second doping type opposite the first doping type. A second E/C material is adjacent a second sidewall of the semiconductor fin along the width of the semiconductor fin. The second E/C material has the second doping type. A width of the first E/C material is different from a width of the second E/C material.

公开(公告)号：US11637181B2

公开(公告)日：2023-04-25

申请号：US17509327

申请日：2021-10-25

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Vibhor Jain ,  Alvin J. Joseph ,  Alexander Derrickson ,  Judson R. Holt ,  John J. Pekarik

IPC: H01L29/08 ,  H01L29/735 ,  H01L29/66 ,  H01L29/417

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to lateral bipolar transistors and methods of manufacture. The structure includes: an extrinsic base comprising semiconductor material; an intrinsic base comprising semiconductor material which is located below the extrinsic base; a polysilicon emitter on a first side of the extrinsic base; a raised collector on a second side of the extrinsic base; and sidewall spacers on the extrinsic base which separate the extrinsic base from the polysilicon emitter and the raised collector.

公开(公告)号：US20230064512A1

公开(公告)日：2023-03-02

申请号：US17456395

申请日：2021-11-24

Applicant: GlobalFoundries U.S. Inc.

Inventor： Vibhor Jain ,  John J. Pekarik ,  Alvin J. Joseph ,  Alexander M. Derrickson ,  Judson R. Holt

IPC: H01L29/735 ,  H01L29/08 ,  H01L29/15 ,  H01L29/10 ,  H01L29/66

Abstract: Embodiments of the disclosure provide a lateral bipolar transistor structure with a superlattice layer and methods to form the same. The bipolar transistor structure may have a semiconductor layer of a first single crystal semiconductor material over an insulator layer. The semiconductor layer includes an intrinsic base region having a first doping type. An emitter/collector (E/C) region may be adjacent the intrinsic base region and may have a second doping type opposite the first doping type. A superlattice layer is on the E/C region of the semiconductor layer. A raised E/C terminal, including a single crystal semiconductor material, is on the superlattice layer. The superlattice layer separates the E/C region from the raised E/C terminal.

公开(公告)号：US20230061219A1

公开(公告)日：2023-03-02

申请号：US17509384

申请日：2021-10-25

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Haiting Wang ,  Alexander Derrickson ,  Jagar Singh ,  Vibhor Jain ,  Andreas Knorr ,  Alexander Martin ,  Judson R. Holt ,  Zhenyu Hu

IPC: H01L29/735 ,  H01L29/66 ,  H01L29/08 ,  H01L29/417 ,  H01L29/737

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor and methods of manufacture. A structure includes: an intrinsic base comprising semiconductor material in a channel region of a semiconductor substrate; an extrinsic base vertically above the intrinsic base; a raised collector region on the semiconductor substrate and laterally connected to the intrinsic base; and a raised emitter region on the semiconductor substate and laterally connected to the intrinsic base.