公开(公告)号：US09349654B2

公开(公告)日：2016-05-24

申请号：US14228258

申请日：2014-03-28

Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.

Inventor： Liang Li ,  Xuesong Rao ,  Martina Damayanti ,  Wei Lu ,  Alex See ,  Yoke Leng Lim

IPC: H01L21/8234 ,  H01L21/311 ,  H01L21/28 ,  H01L29/06 ,  H01L21/762 ,  H01L27/115

CPC classification number: H01L21/823481 ,  H01L21/28229 ,  H01L21/28273 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/762 ,  H01L21/76224 ,  H01L27/11526 ,  H01L27/11546 ,  H01L29/0649

Abstract: Device and a method of forming a device are presented. The method includes providing a substrate prepared with isolation regions. The substrate includes first, second and third regions. The first region includes a memory region, the second region includes a high voltage (HV) region and the third region includes a logic region. An additional dielectric layer covering the substrate and the isolation regions is formed. A first select region is selectively processed while protecting first non-select regions. The first select region is one of the first, second and third device regions. A first gate dielectric is formed on the select region. Top substrate active area and isolation regions of the first non-select regions are not exposed during processing of the first select region and forming the first gate dielectric.

Abstract translation: 介绍了器件和形成器件的方法。 该方法包括提供用隔离区制备的底物。 衬底包括第一，第二和第三区域。 第一区域包括存储区域，第二区域包括高电压（HV）区域，第三区域包括逻辑区域。 形成覆盖基板和隔离区域的附加电介质层。 选择性地处理第一选择区域，同时保护第一非选择区域。 第一选择区域是第一，第二和第三设备区域之一。 在选择区域上形成第一栅极电介质。 第一非选择区域的顶部衬底有源面积和隔离区域在第一选择区域的处理期间不暴露并形成第一栅极电介质。