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1.发明申请公开(公告)号：US20170018452A1
公开(公告)日：2017-01-19
申请号：US14797337
申请日：2015-07-13
发明人： Xinyuan Dou , Sukwon Hong , Satyajit Shinde , Sandeep Gaan , Tao Han , Carlos Chacon , Shimpei Yamaguchi
IPC分类号： H01L21/762 , H01L29/66 , H01L21/3105 , H01L29/423
CPC分类号： H01L21/3105 , H01L21/02164 , H01L21/02271 , H01L21/02323 , H01L21/02337 , H01L21/76229 , H01L29/42356 , H01L29/66795
摘要： Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes forming an isolation trench between two fin structures on an integrated circuit substrate, forming a flowable film in the isolation trench using a flowable chemical vapor deposition process, and annealing the flowable film to form a silicon oxide dielectric layer in the isolation trench. The annealing is performed at a temperature of less than about 200° C. with a process gas including N2 and H2O2.
摘要翻译： 提供了制造集成电路的方法。 在一个示例中，制造集成电路的方法包括在集成电路基板上的两个鳍结构之间形成隔离沟槽，使用可流动的化学气相沉积工艺在隔离沟槽中形成可流动的膜，并对可流动薄膜进行退火以形成 隔离沟槽中的氧化硅介电层。 使用包括N 2和H 2 O 2的工艺气体在小于约200℃的温度下进行退火。
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公开(公告)号：US09831098B2
公开(公告)日：2017-11-28
申请号：US14797337
申请日：2015-07-13
发明人： Xinyuan Dou , Sukwon Hong , Satyajit Shinde , Sandeep Gaan , Tao Han , Carlos Chacon , Shimpei Yamaguchi
IPC分类号： H01L21/3105 , H01L29/423 , H01L29/66 , H01L21/762
CPC分类号： H01L21/3105 , H01L21/02164 , H01L21/02271 , H01L21/02323 , H01L21/02337 , H01L21/76229 , H01L29/42356 , H01L29/66795
摘要： Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes forming an isolation trench between two fin structures on an integrated circuit substrate, forming a flowable film in the isolation trench using a flowable chemical vapor deposition process, and annealing the flowable film to form a silicon oxide dielectric layer in the isolation trench. The annealing is performed at a temperature of less than about 200° C. with a process gas including N2 and H2O2.
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