公开(公告)号：US5790394A

公开(公告)日：1998-08-04

申请号：US767761

申请日：1996-12-17

Applicant: Frank W. Cabaniss ,  Gene F. Young ,  James S. Kluttz

Inventor： Frank W. Cabaniss ,  Gene F. Young ,  James S. Kluttz

IPC: H02J1/10 ,  H02J3/38 ,  H02M7/17 ,  H02M7/155

CPC classification number: H02J3/38 ,  H02J1/108 ,  H02M7/17 ,  Y10T307/707

Abstract: A dual AC input module providing AC line isolation of different phases without the use of relay control. Power supply load is supported through two AC line feeds, each feed being connected through a bridge rectifier to a common bulk DC power supply backplane. The parallel configuration of AC line feeds and bridge rectifiers eliminates the need for relay control logic to open relays and isolate a failed primary AC line feed prior to closing relays to connect a second AC feed to the power supply, as required with previous dual AC input module designs to isolate different line feeds of different phases.

Abstract translation: 双交流输入模块，不使用继电器控制，提供不同相的交流线路隔离。 通过两个交流线路馈电支持电源负载，每个馈电通过桥式整流器连接到通用的大容量直流电源背板。 交流线路馈电和桥式整流器的并联配置不需要继电器控制逻辑来打开继电器并隔离故障的主要交流线路馈电，在关闭继电器之前将第二个交流电源连接到电源，如以前的双交流输入 模块设计来隔离不同阶段的不同线路馈送。

公开(公告)号：US5513152A

公开(公告)日：1996-04-30

申请号：US263628

申请日：1994-06-22

Applicant: Frank W. Cabaniss

Inventor： Frank W. Cabaniss

IPC: G01R31/30 ,  G04F8/00 ,  G06F1/00 ,  H01L21/66

CPC classification number: G01R31/30

Abstract: A circuit and method for determining the operating performance of an integrated circuit which may be used to screen integrated circuits prior to sale or delivery, or to optimize the frequency of the integrated circuit during use. The circuit employs a comparison circuit to compare a first time of arrival of a clock pulse, which is propagating through the integrated circuit with a second time of arrival of the clock signal at a second input. The comparison circuit produces an output signal which may be used to reject or accept the integrated circuit, or to automatically adjust the frequency to minimize the delay.

Abstract translation: 用于确定集成电路的操作性能的电路和方法，其可以用于在销售或传送之前屏蔽集成电路，或者在使用期间优化集成电路的频率。 电路采用比较电路来比较在第二输入端时钟脉冲的第一次到达时间脉冲的第二次到达时间信号的第二时间。 比较电路产生可用于拒绝或接受集成电路的输出信号，或者自动调整频率以使延迟最小化。

公开(公告)号：US4695808A

公开(公告)日：1987-09-22

申请号：US584269

申请日：1984-02-27

Applicant: Frank W. Cabaniss ,  James M. Lockwood

Inventor： Frank W. Cabaniss ,  James M. Lockwood

IPC: H03K3/03 ,  H03K4/06 ,  H03B1/00

CPC classification number: H03K3/0315 ,  H03K4/06

Abstract: An oscillator circuit for outputting clock signals of varying frequency which reduces interference caused by electromagnetic radiation from clock control systems includes a resistor-capacitor network for outputting a delay signal which delays the generation of clock signals by the oscillator by a predetermined time period and modulating the delay signal with an analog signal enabling the oscillator to output clock signals of varying frequency.

Abstract translation: 用于输出变化频率的时钟信号的振荡器电路，其减少来自时钟控制系统的电磁辐射引起的干扰，包括用于输出延迟信号的电阻 - 电容网络，该延迟信号将振荡器产生的时钟信号延迟预定的时间周期，并调制 具有模拟信号的延迟信号，使得振荡器能够输出不同频率的时钟信号。

公开(公告)号：US5467456A

公开(公告)日：1995-11-14

申请号：US311292

申请日：1994-09-23

Applicant: David C. Moxley ,  Frank W. Cabaniss

Inventor： David C. Moxley ,  Frank W. Cabaniss

IPC: G06F13/40 ,  H05K1/02 ,  H05K1/14 ,  G06F13/00

CPC classification number: H05K1/0228 ,  G06F13/4072 ,  H05K1/14 ,  H05K2201/044 ,  H05K2201/09236 ,  H05K2201/09263 ,  Y02B60/1228 ,  Y02B60/1235

Abstract: A physically compact peripheral bus that provides a long electrical distances between signal branch off points. The compact physical spacing allows a high speed peripheral bus to be used to connect a large number of peripheral devices within a computer system enclosure and yet avoiding the reflections experienced when numerous peripheral branch connections are located near to each other. Branch reflections are reduced by providing an electrically short branch length in conjunction with an electrically long printed wiring path for each signal, while maintaining a physically short connector spacing. The physically-short, electrically-long path is accomplished by a serpentine printed wiring conductor path of many folds for each high speed signal path between adjacent branches. Thus, the SCSI recommended spacing of 0.3 meters is provided in a physical spacing of 0.05 meters.

Abstract translation: 一个物理紧凑的外设总线，可在信号分支断点之间提供长距离的电气距离。 紧凑的物理间距允许高速外设总线用于连接计算机系统外壳内的大量外围设备，并且避免了当许多外围分支连接彼此靠近时所经历的反射。 通过为每个信号提供电短的分支长度与电长的印刷布线路径，同时保持物理上短的连接器间隔而减少分支反射。 物理上短的电长路径通过用于相邻分支之间的每个高速信号路径的多个折叠的蛇形印刷布线导体路径来实现。 因此，SCSI推荐间距为0.3米的物理间距为0.05米。

公开(公告)号：US4665467A

公开(公告)日：1987-05-12

申请号：US830027

申请日：1986-02-18

Applicant: Floyd G. Speraw ,  Frank W. Cabaniss

Inventor： Floyd G. Speraw ,  Frank W. Cabaniss

IPC: H05K7/20

CPC classification number: H05K7/209

Abstract: A heat transfer and mounting device having a cross-bar member and at least one leg member. A fastener receptacle is positioned in the cross-bar member for a fastener to affix a heat generating device to the surface of the cross-bar member opposite the at least one leg member. Another fastener receptacle is positioned in the cross-bar member for receiving a fastener to affix a circuit board to the surface of the cross-bar member from which the leg member projects. An additional fastener opening is positioned through the cross-bar member and the leg member for receiving a fastener for attaching the heat conducting body to a heat sink.

Abstract translation: 一种具有横杆构件和至少一个腿构件的传热和安装装置。 紧固件插座定位在用于紧固件的横杆构件中，以将发热装置附接到与至少一个腿构件相对的横杆构件的表面。 另一个紧固件插座定位在横杆构件中，用于接收紧固件，以将电路板固定到腿部构件伸出的横杆构件的表面。 一个附加的紧固件开口被定位成穿过横杆构件和腿构件，用于接收用于将导热体附接到散热器的紧固件。